Hysteresis loops of ferroelectric bilayers and superlattices
A ferroelectric superlattice with an antiferroelectric interfacial coupling is considered; the same model describes a bilayer with antiferroelectric coupling. By mapping minimum points in the Landau free energy expression and plotting them against the applied electric field, a triple hysteresis loop...
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my.um.eprints.81922020-02-03T03:32:01Z http://eprints.um.edu.my/8192/ Hysteresis loops of ferroelectric bilayers and superlattices Chew, Khian Hooi Tilley, D.R. Ong, L.H. Osman, J. QC Physics A ferroelectric superlattice with an antiferroelectric interfacial coupling is considered; the same model describes a bilayer with antiferroelectric coupling. By mapping minimum points in the Landau free energy expression and plotting them against the applied electric field, a triple hysteresis loop pattern is obtained. The loop patterns vary between typically ferroelectric and typically antiferroelectric depending on the layer thicknesses and the magnitude of the interfacial-coupling constant. This work suggests the possibility of designing multilayer elements for computer memories with four or more different storage states. (C) 2000 American Institute of Physics. [S0003-6951(00)03843-2]. AIP Publishing 2000 Article PeerReviewed application/pdf en http://eprints.um.edu.my/8192/1/Chew-2000-Hysteresis_loops_of.pdf Chew, Khian Hooi and Tilley, D.R. and Ong, L.H. and Osman, J. (2000) Hysteresis loops of ferroelectric bilayers and superlattices. Applied Physics Letters, 77 (17). pp. 2755-2757. ISSN 0003-6951 http://apl.aip.org/resource/1/applab/v77/i17/p2755_s1 10.1063/1.1320040 |
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QC Physics Chew, Khian Hooi Tilley, D.R. Ong, L.H. Osman, J. Hysteresis loops of ferroelectric bilayers and superlattices |
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A ferroelectric superlattice with an antiferroelectric interfacial coupling is considered; the same model describes a bilayer with antiferroelectric coupling. By mapping minimum points in the Landau free energy expression and plotting them against the applied electric field, a triple hysteresis loop pattern is obtained. The loop patterns vary between typically ferroelectric and typically antiferroelectric depending on the layer thicknesses and the magnitude of the interfacial-coupling constant. This work suggests the possibility of designing multilayer elements for computer memories with four or more different storage states. (C) 2000 American Institute of Physics. [S0003-6951(00)03843-2]. |
format |
Article |
author |
Chew, Khian Hooi Tilley, D.R. Ong, L.H. Osman, J. |
author_facet |
Chew, Khian Hooi Tilley, D.R. Ong, L.H. Osman, J. |
author_sort |
Chew, Khian Hooi |
title |
Hysteresis loops of ferroelectric bilayers and superlattices |
title_short |
Hysteresis loops of ferroelectric bilayers and superlattices |
title_full |
Hysteresis loops of ferroelectric bilayers and superlattices |
title_fullStr |
Hysteresis loops of ferroelectric bilayers and superlattices |
title_full_unstemmed |
Hysteresis loops of ferroelectric bilayers and superlattices |
title_sort |
hysteresis loops of ferroelectric bilayers and superlattices |
publisher |
AIP Publishing |
publishDate |
2000 |
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http://eprints.um.edu.my/8192/1/Chew-2000-Hysteresis_loops_of.pdf http://eprints.um.edu.my/8192/ http://apl.aip.org/resource/1/applab/v77/i17/p2755_s1 |
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13.211869 |