FPGA based ASIC power-factor control for three-phase inverter

• Main Authors: Mekhilef, Saad, Rahim, N.A.
• Format: Conference or Workshop Item
• Language: English
• Published: 2003
• Subjects: TA Engineering (General). Civil engineering (General); TK Electrical engineering. Electronics Nuclear engineering
• Online Access: http://eprints.um.edu.my/4919/1/FPGA_based_ASIC_power-factor_control_for_three-phase_inverter.pdf; http://eprints.um.edu.my/4919/; http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=1223503

In this paper, a new three-phase inverter power-factor correction PFC scheme is proposed using Field Programmable Gate Array (FPGA) technology all the functions can be implemented in a single chip. The implementation tool fit the entered design into the target device (XC4008E). Design verification includes functional simulator, in circuit testing and timing simulation the main function is to verify the proper operation of the designed circuit. It will compile a design file into a configuration file that is optimized in terms of use of logic gates and interconnections for the target device. Power factor measures how effective electrical power is being used. A high power factor means that electrical power is being utilized effectively, while a low power factor indicates poor utilization of electrical power. The simplest way to improve power factor is to add power factor correction capacitors to your plant distribution system. In this paper a new technique is proposed to improve the power factor, experimental results are presented to show the effectiveness of the proposed technique.