A low power high precision trim-less envelope detector for fail-safe circuit in LVDS receiver

• Main Authors: Lee, Seng Siong, Lee, Lini, Kung, Fabian Wai Lee, Saad, Ahmed, Ramiah, Harikrishnan, Tan, Gim Heng
• Format: Article
• Published: Institute of Electrical and Electronics Engineers 2020
• Subjects: T Technology (General); TK Electrical engineering. Electronics Nuclear engineering
• Online Access: http://eprints.um.edu.my/36366/

This brief presents a trim-less precision envelope detector for fail-safe circuit in LVDS receiver. A preamp is proposed using gm-constant biasing concept to produce an accurate gain of 9.78 dB across PVT covering the full range of the LVDS input common-mode voltage. The preamp produces a fixed output common-mode voltage of 200 mV across supply voltage variation which reduces its complexity by alleviating the need of a trimming circuit. A unique reference voltage generation of the envelope detector based on level shifted output common-mode voltage accurately compares the output common-mode and negative peak voltages to set the detection threshold. An LVDS receiver adopting the proposed envelope detector was fabricated on a standard 0.13-mu m CMOS. With a supply voltage of 3.3 V, the envelope detector achieves a voltage trimming precision of 20 mV while only consuming 162 mu W of power.