An improved 15-level asymmetrical multilevel inverter with reduced switch count

This paper discusses a new and modified circuit topology of a 15-level multilevel inverter having the advantage of lower switch count. The presented topology is having asymmetrical configuration. The superiority of the proposed topology is proved by the fact that it requires lower switches for gener...

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Main Authors: Sarwer, Z., Siddique, M.D., Sarwar, A., Mekhilef, Saad
Format: Article
Published: Springer Science 2021
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Online Access:http://eprints.um.edu.my/35511/
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spelling my.um.eprints.355112023-10-11T07:42:22Z http://eprints.um.edu.my/35511/ An improved 15-level asymmetrical multilevel inverter with reduced switch count Sarwer, Z. Siddique, M.D. Sarwar, A. Mekhilef, Saad TK Electrical engineering. Electronics Nuclear engineering This paper discusses a new and modified circuit topology of a 15-level multilevel inverter having the advantage of lower switch count. The presented topology is having asymmetrical configuration. The superiority of the proposed topology is proved by the fact that it requires lower switches for generating same output levels and at the same time, it is also having lower value of reverse blocking voltage of switches. The detailed comparison with other topologies is explained and shown in tabulated form. The simulation results for different R and RL loading conditions and also for different modulation index are shown in paper. MATLAB/SIMULINK is used for the simulation. Hardware results are also discussed in the paper to validate the simulation results. These results are taken with an experimental prototype. A brief summary is also presented in the last section of the presented work. © 2021, The Author(s), under exclusive license to Springer Nature Singapore Pte Ltd. Springer Science 2021 Article PeerReviewed Sarwer, Z. and Siddique, M.D. and Sarwar, A. and Mekhilef, Saad (2021) An improved 15-level asymmetrical multilevel inverter with reduced switch count. Lecture Notes in Electrical Engineering, 723 LN. pp. 709-718. ISSN 1876-1100, DOI https://doi.org/10.1007/978-981-33-4080-0_68 <https://doi.org/10.1007/978-981-33-4080-0_68>. 10.1007/978-981-33-4080-0_68
institution Universiti Malaya
building UM Library
collection Institutional Repository
continent Asia
country Malaysia
content_provider Universiti Malaya
content_source UM Research Repository
url_provider http://eprints.um.edu.my/
topic TK Electrical engineering. Electronics Nuclear engineering
spellingShingle TK Electrical engineering. Electronics Nuclear engineering
Sarwer, Z.
Siddique, M.D.
Sarwar, A.
Mekhilef, Saad
An improved 15-level asymmetrical multilevel inverter with reduced switch count
description This paper discusses a new and modified circuit topology of a 15-level multilevel inverter having the advantage of lower switch count. The presented topology is having asymmetrical configuration. The superiority of the proposed topology is proved by the fact that it requires lower switches for generating same output levels and at the same time, it is also having lower value of reverse blocking voltage of switches. The detailed comparison with other topologies is explained and shown in tabulated form. The simulation results for different R and RL loading conditions and also for different modulation index are shown in paper. MATLAB/SIMULINK is used for the simulation. Hardware results are also discussed in the paper to validate the simulation results. These results are taken with an experimental prototype. A brief summary is also presented in the last section of the presented work. © 2021, The Author(s), under exclusive license to Springer Nature Singapore Pte Ltd.
format Article
author Sarwer, Z.
Siddique, M.D.
Sarwar, A.
Mekhilef, Saad
author_facet Sarwer, Z.
Siddique, M.D.
Sarwar, A.
Mekhilef, Saad
author_sort Sarwer, Z.
title An improved 15-level asymmetrical multilevel inverter with reduced switch count
title_short An improved 15-level asymmetrical multilevel inverter with reduced switch count
title_full An improved 15-level asymmetrical multilevel inverter with reduced switch count
title_fullStr An improved 15-level asymmetrical multilevel inverter with reduced switch count
title_full_unstemmed An improved 15-level asymmetrical multilevel inverter with reduced switch count
title_sort improved 15-level asymmetrical multilevel inverter with reduced switch count
publisher Springer Science
publishDate 2021
url http://eprints.um.edu.my/35511/
_version_ 1781704477351346176
score 13.201949