Design of a multi valued current mode comparator
In this paper, a low-power quaternary comparator circuit using current-mode CMOS multiple-valued logic (MVL) circuits has been presented. Existing MVL comparator circuits consume high power. The circuit presented in this paper low power. It has been simulated with PSPICE using the transistor mode...
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| Main Authors: | , , |
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| Format: | Article |
| Language: | English |
| Published: |
INSI Publications
2011
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| Subjects: | |
| Online Access: | http://irep.iium.edu.my/7353/1/662-666.pdf http://irep.iium.edu.my/7353/ http://www.insipub.com/ajbas/2011/October-2011/662-666.pdf |
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