Design of a high-speed, reconfigurable digital rank order filter
A new architecture to realize a modular, high speed, reconfigurable, digital Rank Order Filter (ROF) is presented in this paper. A bit-level algorithm by Kar and Pradhan has been modified in this work to implement the proposed ROF. Using the proposed digital rank selection circuit it is possible to...
Saved in:
| Main Authors: | , , |
|---|---|
| Format: | Article |
| Language: | English |
| Published: |
IIUM Press
2009
|
| Subjects: | |
| Online Access: | http://irep.iium.edu.my/4496/1/Design_of_a_high-speed%2C_reconfigurable_digital_rank_order_filter.pdf http://irep.iium.edu.my/4496/ http://www.iium.edu.my/ejournal/home2010/index.php/iiumej/article/view/102 |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|