A Bayesian network-based framework with Constraint Satisfaction Problem (CSP)formulations for FPGA system design

In recent years, there has been a growing interest in IP-reuse for SoCs in order to bridge the gap between the silicon capacity and the design productivity. This research work investigates how our proposed methodology can be used to partition and schedule a JPEG encoder IP core onto an FPGA. We wi...

全面介绍

Saved in:
书目详细资料
Main Authors: Azman, Amelia Wong, Bigdeli, Abbas, Mohd-Mustafah, Yasir, Biglari-Abhari, Morteza, Lovell, Brian
格式: Conference or Workshop Item
语言:English
出版: 2010
主题:
在线阅读:http://irep.iium.edu.my/102/1/ASAP.pdf
http://irep.iium.edu.my/102/
http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=5540784&isnumber=5540749
标签: 添加标签
没有标签, 成为第一个标记此记录!