A Bayesian network-based framework with Constraint Satisfaction Problem (CSP)formulations for FPGA system design

• 主要な著者: Azman, Amelia Wong, Bigdeli, Abbas, Mohd-Mustafah, Yasir, Biglari-Abhari, Morteza, Lovell, Brian
• フォーマット: Conference or Workshop Item
• 言語: English
• 出版事項: 2010
• 主題: QA76 Computer software
• オンライン･アクセス: http://irep.iium.edu.my/102/1/ASAP.pdf; http://irep.iium.edu.my/102/; http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=5540784&isnumber=5540749

In recent years, there has been a growing interest in IP-reuse for SoCs in order to bridge the gap between the silicon capacity and the design productivity. This research work investigates how our proposed methodology can be used to partition and schedule a JPEG encoder IP core onto an FPGA. We wi...