Performance comparison of radix-based multiplier designs

Fast multiplication is used to replace the conventional multiplier to increase the performance and efficiency of the multiplier since multipliers are becoming more important in Digital Signal Processing. Multipliers designed in this project were the Radix-based Multiplier inclusive of Radix-2, Ra...

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Main Author: KELLY SUET SWEE, LIEW
Format: Final Year Project
Language:English
Published: Universii Teknologi Petronas 2012
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Online Access:http://utpedia.utp.edu.my/8315/1/2011%20-%20Performance%20comparison%20of%20radix-based%20multiplier%20designs.pdf
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spelling my-utp-utpedia.83152017-01-25T09:41:13Z http://utpedia.utp.edu.my/8315/ Performance comparison of radix-based multiplier designs KELLY SUET SWEE, LIEW TK Electrical engineering. Electronics Nuclear engineering Fast multiplication is used to replace the conventional multiplier to increase the performance and efficiency of the multiplier since multipliers are becoming more important in Digital Signal Processing. Multipliers designed in this project were the Radix-based Multiplier inclusive of Radix-2, Radix-4, Radix-8, Radix-16 and Radix-32 Booth Encoding multipliers. These Radixbased multipliers are able to increase the compression time, contribute to a great savings in silicon area and also the number of stages to be added that is known as speed. The speed and the partial products in these Radix-based multipliers reduced significantly compared to the common addition and shift multiplication. In this Final Year Project, the Radix-based Booth Encoding multipliers were designed, logic simulation was conducted and logic synthesize was performed to obtain the area and timing. The relative performance of each multiplier was compared to determine the suitable type of Digital Signal Processing applications in terms of its speed and area performances. The Project began by defming the problem statement and identifying the objectives and outcomes of the project. Next, the Radix-based multipliers were designed using Verilog Hardware Description Language. It was then logic simulated using Modelsim, simulation software produced by Mentor Graphics to verify the multiplier designs created. Then, the designs were synthesized in Leonardo Spectrum to obtain the performance parameters such as area and timing of the Radix-based multipliers. The synthesis process was done by synthesizing it in TSMC 0.35-microns ASIC standard cell library. An analysis of the performance obtained were then compared in order to determine whi~h type of Radix-based multipliers give better results in different aspects of performances. The performance of Radix-based designs will then be compared to the five other multiplier designs performances created previously by Chris Lee inclusive of Array, Wallace, Dadda and ReducedArea multipliers. The Project ended with a conclusion and recommendations. Universii Teknologi Petronas 2012-01 Final Year Project NonPeerReviewed application/pdf en http://utpedia.utp.edu.my/8315/1/2011%20-%20Performance%20comparison%20of%20radix-based%20multiplier%20designs.pdf KELLY SUET SWEE, LIEW (2012) Performance comparison of radix-based multiplier designs. Universii Teknologi Petronas. (Unpublished)
institution Universiti Teknologi Petronas
building UTP Resource Centre
collection Institutional Repository
continent Asia
country Malaysia
content_provider Universiti Teknologi Petronas
content_source UTP Electronic and Digitized Intellectual Asset
url_provider http://utpedia.utp.edu.my/
language English
topic TK Electrical engineering. Electronics Nuclear engineering
spellingShingle TK Electrical engineering. Electronics Nuclear engineering
KELLY SUET SWEE, LIEW
Performance comparison of radix-based multiplier designs
description Fast multiplication is used to replace the conventional multiplier to increase the performance and efficiency of the multiplier since multipliers are becoming more important in Digital Signal Processing. Multipliers designed in this project were the Radix-based Multiplier inclusive of Radix-2, Radix-4, Radix-8, Radix-16 and Radix-32 Booth Encoding multipliers. These Radixbased multipliers are able to increase the compression time, contribute to a great savings in silicon area and also the number of stages to be added that is known as speed. The speed and the partial products in these Radix-based multipliers reduced significantly compared to the common addition and shift multiplication. In this Final Year Project, the Radix-based Booth Encoding multipliers were designed, logic simulation was conducted and logic synthesize was performed to obtain the area and timing. The relative performance of each multiplier was compared to determine the suitable type of Digital Signal Processing applications in terms of its speed and area performances. The Project began by defming the problem statement and identifying the objectives and outcomes of the project. Next, the Radix-based multipliers were designed using Verilog Hardware Description Language. It was then logic simulated using Modelsim, simulation software produced by Mentor Graphics to verify the multiplier designs created. Then, the designs were synthesized in Leonardo Spectrum to obtain the performance parameters such as area and timing of the Radix-based multipliers. The synthesis process was done by synthesizing it in TSMC 0.35-microns ASIC standard cell library. An analysis of the performance obtained were then compared in order to determine whi~h type of Radix-based multipliers give better results in different aspects of performances. The performance of Radix-based designs will then be compared to the five other multiplier designs performances created previously by Chris Lee inclusive of Array, Wallace, Dadda and ReducedArea multipliers. The Project ended with a conclusion and recommendations.
format Final Year Project
author KELLY SUET SWEE, LIEW
author_facet KELLY SUET SWEE, LIEW
author_sort KELLY SUET SWEE, LIEW
title Performance comparison of radix-based multiplier designs
title_short Performance comparison of radix-based multiplier designs
title_full Performance comparison of radix-based multiplier designs
title_fullStr Performance comparison of radix-based multiplier designs
title_full_unstemmed Performance comparison of radix-based multiplier designs
title_sort performance comparison of radix-based multiplier designs
publisher Universii Teknologi Petronas
publishDate 2012
url http://utpedia.utp.edu.my/8315/1/2011%20-%20Performance%20comparison%20of%20radix-based%20multiplier%20designs.pdf
http://utpedia.utp.edu.my/8315/
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