Hardware prototyping of Iris recognition system: A neural network approach

• Main Authors: Florence Choong Chiao Mei,, Mamun Ibne Reaz,, Tan, Ai Leng, Faisal Mohd Yasin,
• Format: Article
• Language: English
• Published: penerbit UKM 2007
• Online Access: http://journalarticle.ukm.my/1474/1/2007-Article_7_K-19.pdf; http://journalarticle.ukm.my/1474/; http://www.ukm.my/jkukm/index.php/jkukm

Iris recognition, a relatively new biometric technology, possesses great advantages, such as variability, stability and security, making it to be the most promising method for high security environments. A novel hardware-based iris recognition system is proposed in this paper, which consists of two main parts: image processing and recognition. Image processing involves histogram stress, thresholding, cropping, transformation and normalizing that is performed by using Matlab. Multilayer perceptron architecture with backpropagation algorithm is employed to recognize iris pattern. The entire architecture was modeled using VHDL, a hardware description language. The approach obtained a recognition accuracy of 98.5%. The design was successfully implemented, tested and validated on Altera Mercury EP1M120F484C5 FPGA utilizing 4157 logic cells and achieved a maximum frequency of 121.87 MHz. This novel and efficient method in hardware, based on FPGA technology showed improved performance over existing approaches for iris recognition