Dynamic power saving for CMOS circuits
With more functionalities being integrated into a microchip today, higher processing power is drawn. As a result of this, clock and logic power consumption has turned out to be a critical issue to be coped with by chip designers. In this paper, we present various power-saving approaches employed in...
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| Main Authors: | , , , , |
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| Format: | Article |
| Language: | en |
| Published: |
Penerbit Universiti Kebangsaan Malaysia
2024
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| Online Access: | http://journalarticle.ukm.my/25528/1/kejut_6.pdf http://journalarticle.ukm.my/25528/ https://www.ukm.my/jkukm/volume-3604-2024/ |
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