Hamzah, A. (2018). Low-voltage high-speed programming gate-all-around floating gate memory cell with tunnel barrier engineering. Japan Society of Applied Physics.
Chicago Style CitationHamzah, Afiq. Low-voltage High-speed Programming Gate-all-around Floating Gate Memory Cell With Tunnel Barrier Engineering. Japan Society of Applied Physics, 2018.
MLA引文Hamzah, Afiq. Low-voltage High-speed Programming Gate-all-around Floating Gate Memory Cell With Tunnel Barrier Engineering. Japan Society of Applied Physics, 2018.
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