Low-voltage CMOS switch for high-speed rail-to-rail sampling
Sampling switches have a dominant role in switched-capacitor circuits and analog-to-digital convertors. Since they act as input gates, their nonlinearities directly degrade the quality of the input signals. The scaling-down trend of CMOS technology and increasing demands for high-speed and power-eff...
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| 主要な著者: | , , |
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| フォーマット: | 論文 |
| 出版事項: |
Birkhauser Boston
2016
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| オンライン･アクセス: | http://eprints.utm.my/id/eprint/73798/ https://www.scopus.com/inward/record.uri?eid=2-s2.0-84958241634&doi=10.1007%2fs00034-015-0101-x&partnerID=40&md5=5700b4503dacf6673b962ef4ba031a73 |
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| 要約: | Sampling switches have a dominant role in switched-capacitor circuits and analog-to-digital convertors. Since they act as input gates, their nonlinearities directly degrade the quality of the input signals. The scaling-down trend of CMOS technology and increasing demands for high-speed and power-efficient circuits pose design challenge in high-speed sampling switches for low-voltage applications. To address this issue, an optimized CMOS switch is proposed in this paper consisting of a bootstrapped NMOS switch and a boosted PMOS switch as a transmission gate. By utilizing this technique, the nonlinearity resulting from the threshold voltage variation (body effect) of NMOS switch is mitigated, considerably. |
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