Search Results - parallel programme a algorithm

Parallel computation of maass cusp forms using mathematica by Chan, Kar Tim

“…Our parallel programme comprises of two important parts namely the pullback algorithm and also the Maass cusp form algorithm. …”
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Enhancing performance of XTS cryptography mode of operation using parallel design by Ahmed Alomari, Mohammad

“…To fully utilize the performance potential of XTS mode of operation, a parallel design for the algorithm is proposed. …”
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VHDL modeling and simulation of the back-propagation algorithm and its mapping to the RM by Erdogan, S. S., Abdul Rahman, Abdul Wahab, T., H. Hong

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Investigation on the dynamic of computation of semi autonomous evolutionary computation for syntactic optimization of a set of programming codes by Mohammad Sigit Arifianto, Tze, Kenneth Kin Teo, Liau, Chung Fan, Liawas Barukang, Zaturrawiah Ali Omar

“…The more processors utilized leads to the less computation time but the more communication time. In order to have a realistic characteristic of a parallel computing engine, a Rocks based computer cluster was built and used for the test. …”
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Design and analysis of high performance matrix filling for DNA sequence alignment accelerator using asic design flow: article / Nurzaima Mahmod by Mahmod, Nurzaima

“…The scope of this paper is to optimize the DNA sequences alignment on the matrix rilling module by implementing a parallel method of the Smith-Waterman algorithm. …”
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OPTIMAL DATAPATH DESIGN FOR A CRYPTOGRAPHIC PROCESSOR: THE BLOWFISH ALGORITHM by Zain Ali, Noohul Basheer, Noras, James

“…BLOWFISH is a fast cryptographic software algorithm, using the operations of addition, XOR and look-up tables. …”
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Design and analysis of high performance matrix filling for DNA sequence alignment accelerator using ASIC design flow / Nurzaima Mahmod by Mahmod, Nurzaima

“…The scope of this paper is to optimize the DNA sequences alignment on the matrix filling module by implementing a parallel method of the SmithWaterman algorithm. …”
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Implementation of High Speed Large Integer Multiplication Algorithm on Contemporary Architecture by Chang, Boon Chiao

“…We started with a preliminary design of a multiplier run with typical NTT module that perform computation in parallel-in-serial-out manner before we moved into design with radix-R FNT modules that are able to compute in parallel-in-parallel-out manner for better performance. …”
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Studies on flat CORDIC implementation in field programmable gate arrays (FPGA) / Meera Subramaniam by Meera , Subramaniam

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Developed method of FPGA-based fuzzy logic controller design with the aid of conventional PID algorithm by Obaid, Zeyad Assi, Sulaiman, Nasri, Hamidon, Mohd Nizar

“…This method also enables us to design the controller to work as PDFLC, PIFLC or PIDFLC depending on two (one-bit) external signals with programmable fuzzy sets and programmable rule table using VHDL language for implementation on FPGA device, and to employ the new technique of fuzzy algorithm in order to serve a wide range of the physical systems which require a real-time operation. …”
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Design and implementation of multimedia digital matrix system by Chui, Yew Leong, Ramli, Abdul Rahman, Perumal, Thinagaran, Sulaiman, Mohd Yusof, Ali, Mohd Liakot

“…Due to the issues of signal integrity in high-speed digital design, a new adaptive channel synchronization algorithm has been developed. …”
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Solution For Nonlinear Riccati Equation By Block Method by Rasedee, AFN, Ijam, HM, Sathar, MHA, Ishak, N, Hamzah, SR, Sahrim, M, Ismail I.

Design of field programmable gate array-based proportional-integral-derivative fuzzy logic controller with tunable ganin by Obaid, Zeyad Assi

“…The PIDFC is designed as a PDFC and PIFC connected in parallel through a summer. …”
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A new parameterized architectural design for SENSE reconstruction by Siddiqui, M.F., Reza, A.W., Kanesan, J., Omer, H.

“…This architecture is also synthesized for Field Programmable Gate Array (FPGA). Complex multiplier, divider and complex matrix multiplier modules are designed to implement the algorithm. …”
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MINIMIZATION OF RESOURCE UTILIZATION FOR A REAL-TIME DEPTH-MAP COMPUTATIONAL MODULE ON FPGA by NGO , NGO HUY TAN

“…The algorithm is computationally intensive and therefore more effective to be implemented on hardware such as the Field Programmable Gate Array (FPGA). …”
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FPGA implementation of MCPFSK modulation for HF data communication by Fitri Dewi, Jaswar, Ahmad Zuri, Sha’ameri

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Solution for nonlinear Riccati equation by block method by Rasedee A.F.N., Ijam H.M., Sathar M.H.A., Ishak N., Hamzah S.R., Mus'ab Sahrim, Ismail I.

Design and development of high performance swa cell design for local DNA sequence alignment by Syed Abdul Rahman, Syed Abdul Mutalib Al Junid

“…Moreover, the OSL, OSA and ORSL cell designs reduce the complexity of the DNA sequence alignment by rescheduling the process of alignment via a new parallel arrangement of the processing or computational element. …”
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Magnetic resonance imaging sense reconstruction system using FPGA / Muhammad Faisal Siddiqui by Muhammad Faisal , Siddiqui

“…Parallel imaging is a robust method for accelerating the data acquisition in Magnetic Resonance Imaging (MRI). …”
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Digital Signal Processor (DSP) Design Using Very Long Instruction Word (VLIW) Architecture by Lee, Lini @ Lini Lee

“…However, the pDSP chip has better ability to perform number crunching algorithms simultaneously. The objective of this research is to design and implement a general-purpose programmable DSP (Digital Signal Processor) core. …”
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