Search Results - parallel process writing algorithm*

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    GPU accelerated stereo vision system to capture handwriting information

    GPU accelerated stereo vision system to capture handwriting information by Fadi Imad, Syed Ahmad, Sharifah Mumtazah, Hashim, Shaiful Jahari, Samsudin, Khairulmizam

    Published 2019
    “…This is done by porting and optimizing essential processing algorithms to operate efficiently in parallel on a GPU. …”
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  2. 2
    Development of Digital Image Processing Algorithms via FPGA Implementation

    Development of Digital Image Processing Algorithms via FPGA Implementation by Shamsiah, Suhaili, Joyce, Huong Shing Yii, Asrani, Lit, Kuryati, Kipli, Maimun, Huja Husin, Mohamad Faizrizwan, Mohd Sabri, Norhuzaimin, Julai

    Published 2024
    “…Platforms such as ModelSim Altera and Intel Quartus II are used to write Verilog HDL for digital image processing algorithms. …”
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    Online teleoperation of writing manipulator through graphics processing unit based accelerated stereo vision

    Online teleoperation of writing manipulator through graphics processing unit based accelerated stereo vision by Abu Raid, Fadi Imad Osman

    Published 2021
    “…These algorithms are then parallelized using Compute Unified Device Architecture CUDA C language to run on Graphics Processing Unit GPU for hardware acceleration. …”
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    Thesis
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  4. 4
    Implementation of a Symmetric Chaotic Encryption Scheme

    Implementation of a Symmetric Chaotic Encryption Scheme by Sivanandan, Easwari

    Published 2004
    “…The implementation ofthis scheme is specified to do real time processing ofvoice data. It can also be used to read, encrypt and write a wave file. …”
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    Final Year Project
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