Search Results - parallel motion estimation algorithm

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    A bit-serial sum of absolute difference accelerator for variable block size motion estimation of H.264 by Fatemi, M.R.H., Ates, H.F., Salleh, R.

    Published 2009
    “…In this paper, we propose the first least significant bit (LSB) bit-serial sum of absolute difference (SAD) hardware accelerator for integer variable block size motion estimation (VBSME) of H.264. This hardware accelerator is based on a previous state-of-art bit-parallel architecture namely propagate partial SAD. …”
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  2. 2

    Algorithm optimization and low cost bit-serial architecture design for integer-pixel and sub-pixel motion estimation in H.264/AVC / Mohammad Reza Hosseiny Fatemi by Hosseiny Fatemi, Mohammad Reza

    Published 2012
    “…This thesis is concerned with algorithm optimization and efficient low cost architecture design for integer motion estimation (IME) and sub-pixel motion estimation (SME) of H.264/AVC. …”
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    Thesis