Search Results - parallel computing ((rsa algorithm) OR (path algorithm))*

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  1. 1

    Parallel Processing of RSAAlgorithm Using MPI Library by Wan Dagang, Wan Rahaya

    Published 2006
    “…The system is needed to be parallel as to overcome the problem of intensive computational by the RSA algorithm. …”
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    Final Year Project
  2. 2

    Implementation of Grid Computing for Cryptosystem (RSA) by Abd Wahab, Mohamed Ferdaus

    Published 2005
    “…However, withthe emerging of grid computing architecture, it is believe that processing time to process RSA algorithm can be reduce as it use more resource together with a parallel computing element. …”
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    Final Year Project
  3. 3

    A parallel version of a binary method and vector addition chains precomputation for exponentiation in RSA / Siti Khatijah Nor Abdul Rahim and Siti Rozanae Ismail by Abdul Rahim, Siti Khatijah Nor, Ismail, Siti Rozanae

    Published 2006
    “…However, we also constructed an algorithm for a parallel version of Vector Addition Chains to enhance the performance. …”
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    Research Reports
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    A comparative review on symmetric and asymmetric dna-based cryptography by Hammad B.T., Sagheer A.M., Ahmed I.T., Jamil N.

    Published 2023
    “…As observed, the computational time of RSA algorithm combined with DNA coding was longer. …”
    Article
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    Solving traveling salesman problem on cluster compute nodes by I.A., Aziz, Haron, N., Mehat, M., Jung, L.T., Mustapa, A.N., Akir, E.A.P.

    Published 2009
    “…The sequential algorithm is then converted into a parallel algorithm by integrating it with the Message Passing Interface (MPI) libraries so that it can be executed on a cluster computer. …”
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    Article
  7. 7

    Enhancing speed performance of the cryptographic algorithm based on the lucas sequence by M. Abulkhirat, Esam

    Published 2003
    “…The improved algorithm is applied on the lab-PC for the sequential platform, and cluster-computing machine for the parallel platform, which lead to a substantial time reduction and an enhancement of the algorithm speed in both platforms.…”
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    Thesis
  8. 8

    High-Speed shortest path co-processor design by Idris, Mohd Yamani Idna, Abu Bakar, Suraya, Tamil, Emran Mohd, Razak, Zaidi, Noor, Noorzaily Mohamed

    Published 2009
    “…Shortest path algorithms are significant in graph theory and have been applied in many applications such as transportation and networking. …”
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    Conference or Workshop Item
  9. 9

    Tool path generation of contour parallel based on ant colony optimisation by Abdullah, Haslina, Ramli, Rizauddin, Abd Wahab, Dzuraidah, Abu Qudeiri, Jaber

    Published 2016
    “…The optimisation of tool path length based on ACO algorithm ascertained that the cutting tool remove the uncut line once and able to eliminate the uncut region in the shortest tool path length. …”
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    Article
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    Implementation of High Speed Large Integer Multiplication Algorithm on Contemporary Architecture by Chang, Boon Chiao

    Published 2018
    “…We started with a preliminary design of a multiplier run with typical NTT module that perform computation in parallel-in-serial-out manner before we moved into design with radix-R FNT modules that are able to compute in parallel-in-parallel-out manner for better performance. …”
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    Final Year Project / Dissertation / Thesis
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    Unconstraint assignment problem : a molecular computing approach by Zuwairie, Ibrahim, Yusei, Tsuboi, Osamu, Ono, Marzuki, Khalid

    Published 2006
    “…Since DNA computing is very suitable for combinatorial problems, in thispaper, an idea on DNA-based computing algorithm for solving unconstraint assignment problem is proposed. …”
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    Article
  15. 15

    A new parameterized architectural design for SENSE reconstruction by Siddiqui, M.F., Reza, A.W., Kanesan, J., Omer, H.

    Published 2014
    “…Reconfigurable hardware based architectures that could provide good quality image reconstruction for parallel Magnetic Resonance Imaging (MRI) within very less computation time are in high demand. …”
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    Conference or Workshop Item
  16. 16

    A novel large-bit-size architecture and microarchitecture for the implementation of Superscalar Pipeline VLIW microprocessors by Lee, Weng Fook

    Published 2008
    “…To further grow the computational capability of a microprocessor, there are two possible paths. …”
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    Thesis
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    Hybrid Method for Digits Recognition using Fixed-Frame Scores and Derived Pitch by Sudirman, Rubita, Salleh, Sh-Hussain, Salleh, Shaharuddin

    Published 2006
    “…The enthusiasm to this study is due to neural network limitation that entails a fix number of input nodes for when processing multiple inputs in parallel. Due to this problem, this research is initiated to reduce the amount of computation and complexity in a neural network by reducing the number of inputs into the network. …”
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    Article
  20. 20

    Magnetic resonance imaging sense reconstruction system using FPGA / Muhammad Faisal Siddiqui by Muhammad Faisal , Siddiqui

    Published 2016
    “…Sensitivity Encoding (SENSE) is a widely used technique to reconstruct the artefact free images from the Parallel MRI (pMRI) aliased data. Reconfigurable hardware based architecture for SENSE has a great potential to provide good quality image reconstruction with significantly less computation time. …”
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    Thesis