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  1. 1
    Speeding up index construction with GPU for DNA data sequences

    Speeding up index construction with GPU for DNA data sequences by Rahmaddiansyah, , Abdul Rashid, Nur’aini

    Published 2011
    “…Graphic processor unit (GPU) is used to parallelize a segment of an indexing algorithm. In this research, we used a GPU to parallelize the sorting part of suffix array construction algorithm.Our results show that the GPU is able to accelerate the process of building the index of the suffix array by 1.68 times faster than without GPU.…”
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  2. 2
    Image classification using two dimensional wavelet coefficients with parallel computing

    Image classification using two dimensional wavelet coefficients with parallel computing by Ong, Yew Fai

    Published 2020
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    Final Year Project / Dissertation / Thesis
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  3. 3
    Multi-criteria divisible load scheduling in binary tree network

    Multi-criteria divisible load scheduling in binary tree network by Ghanbari, Shamsollah

    Published 2016
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  4. 4
    Energy-aware task scheduling for streaming applications on NoC-based MPSoCs

    Energy-aware task scheduling for streaming applications on NoC-based MPSoCs by Abd Ishak, Suhaimi Abd Ishak, Wu, Hui, Tariq, Umair Ullah

    Published 2024
    “…Our approach is supported by a set of novel techniques, which include constructing an initial schedule based on a list scheduling where the priority of each task is its approximate successor-tree-consistent deadline such that the workload across all the processors is balanced, a retiming heuristic to transform intraperiod dependencies into inter-period dependencies for enhancing parallelism, assigning an optimal discrete frequency for each task and each message using a Non-Linear Programming (NLP)-based algorithm and an Integer-Linear Programming (ILP)-based algorithm, and an incremental approach to reduce the memory usage of the retimed schedule in case of memory size violations. …”
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  5. 5
    A 'snowflake' geometrical representation for optimised degree six 3-modified chordal ring networks

    A 'snowflake' geometrical representation for optimised degree six 3-modified chordal ring networks by Chien, Stephen Lim Een, Raja Maamor Shah, Raja Noor Farah Azura, Othman, Mohamed

    Published 2016
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  6. 6
    Algorithm optimization and low cost bit-serial architecture design for integer-pixel and sub-pixel motion estimation in H.264/AVC / Mohammad Reza Hosseiny Fatemi

    Algorithm optimization and low cost bit-serial architecture design for integer-pixel and sub-pixel motion estimation in H.264/AVC / Mohammad Reza Hosseiny Fatemi by Hosseiny Fatemi, Mohammad Reza

    Published 2012
    “…The second design uses a 2-D bit-serial adder tree connected to a reconfigurable reference buffer making it suitable for hardware parallelism. …”
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