Search Results - (programmable OR (programs OR program)) (five OR data) array

Programming in C for foundation by Bakar, Noor Hasrina, Hassan, Noor Azimah, Idris, Mohd Norhaedir, Al-Shawabkeh, Mahmoud

“…Many advanced topics of “Arrays” and “Strings” are discussed. Search and sort as well as passing arrays between functions are demonstrated in chapter 5 the longest chapter in the book. …”
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Matlab modeled for real time processing of partial discharge detection using fpga technology with giga hertz data acquisition by Emilliano, Chakrabarty C.K., Basri A., Ramasamy A.K., Devkumar S., Hock G.C., Badjian M.H.

FPGA configuration on Xilinx ML506 development board through the USB port in C/HDL by Kushal, Sreedhar

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FPGA simulation of AD converter by using Giga Hertz speed data acquisition for partial discharge detection by Emilliano, Chakrabarty C.K., Basri A., Ramasamy A.K., Ping L.C.

“…Currently, FPGA (Field Programmable Gate Array) technology is being widely used for accelerator control owing to its fast digital processing capability. …”

Data structure uniqueness in Python programming language / Jamal Othman by Othman, Jamal

“…Python is a powerful programming language which supports the creation of application systems, penetration of security testing and conduct complex data analysis on huge volume of data (data science). …”
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VHDL simulation of reset automatic block, 64 bit latch block, and test complete blocks for PD detection circuit system using FPGA by Emilliano, Chakrabarty C.K., Ghani A.B.A., Ramasamy A.K.

“…The research shall involve ISE Simulator version 10.1i (Xilinx) and ISE Xilinx Synthesized Technology (XST) using Very high integrated circuit Hardware Description Language (VHDL) programming to evaluate the use of Field Programming Gate Array (FPGA) for the detection and counting of partial discharge signals in high voltage underground cable. …”

High-bandwidth, low-power CMOS transistor based cab for field programmable analog array by Al-Bawri, Samir Salem, Obadi, Ameen, Hossain, Kabir, Abdulhameed, Abdullah, Jusoh, Muzammil, Sabapathy, Thennarasan, El-Din Hussein, Alaa, Al Gburi, Ahmed Jamal Abdullah

“…Simulation of the proposed CMOS Transistor Based CAB system is carried out using Tanner EDA Tools in 0.35 μm standard CMOS technology. The design uses a ±1.5 V power supply and results in maximum 3 dB bandwidth of 34.9 MHz and an approximate size of 0.0537 mm2. …”
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Design and implementation of a direct torque control of induction machine utilizing a digital signal processor and the field programmable gate arrays by Toh, C. L., Idris, Nik Rumzi, Yatim, A. H. M., Patkar, Fadzli

“…Employing both DSP and FPGA in motion control will This is because the lack of flexibility to modify or to adapt the give advantages of rapid prototyping and higher switching design to different types of motor drives, once the chip is built frequency in Direct Torque Control (DTC) drive. This paper [1], [5]. A special class of ASIC known as Field Programmable presents a high performance DTC induction motor drive with Gate Arrays (FPGA's) offers a realistic alternative. …”
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Partial discharge detection system for counting PD signals in high voltage underground cable by using FPGA technology by Emilliano, Chakrabarty C.K., Ramasamy A.K., Ghani A.B.A.

“…Currently, FPGA (Field Programmable Gate Array) technology is being widely used for signal processing and control owing to its fast digital processing capability. …”

Design Of Direct Sequence Code Division Multiple Access (Ds-Cdma) Wireless Transmitter Using Field Programmable Gate Array (Fpga) by Osman, Khalid Eltahir Mohamed

“…This thesis describes the DS-CDMA wireless transmitter design using FPGA (Field Programmable Gate Array), which has been adopted in many wireless access technologies. …”
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Mobile application learning programme to learn fundamental of data structure using Gagne's learning style / Muhammad Syafiq Izzuddin Bahrin by Muhammad Syafiq Izzuddin Bahrin

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VHDL implementation for measurement of the distance test distribution pattern of the Tri-Axial magnetic probe for the PD detection circuit system by using 3 GHz ADC and FPGA by Emilliano, Chakrabarty C.K., Ghani A.B.A., Ramasamy A.K.

“…The research shall involve ISE Simulator version 10.1i (Xilinx) and ISE Xilinx Synthesized Technology (XST) using Very high integrated circuit Hardware Description Language (VHDL) programming to evaluate the use of Field Programming Gate Array (FPGA-Xilinx Virtex 5 ML501 Board) for the detection and counting of partial discharge signals in high voltage underground cable. …”

Online partial discharge counting system using microcontroller PIC 16F877A and FPGA technology by Emilliano, Chakrabarty C.K., Ghani A.B.A., Ramasamy A.K.

“…The research involve ISE Simulator version 10.1i (Xilinx) and ISE Xilinx Synthesized Technology (XST) using Very high integrated circuit Hardware Description Language (VHDL) programming to evaluate the use of Field Programming Gate Array (FPGA) for the detection and counting of partial discharge signals in high voltage underground cable. …”

Embedded System Real Time Data Acquisition System Using FPGA Technology for Detection and Counting of PD Signal from PICO Pulse Generator by Emilliano, Chakrabarty C.K., Basri A., Ramasamy A.K., Suhendi N.

“…Artificial intelligence; Cables; Controllers; Data acquisition; Field programmable gate arrays (FPGA); Microcontrollers; Partial discharges; Photonic integration technology; Signal detection; Signal sampling; Underground cables; Direct measurement; Fpga(field programmable gate array); High speed data acquisition system; Partial discharge signal; PIC microcontrollers; Processing capability; Real-time data acquisition systems; Sampling frequencies; Pulse generators…”

Design and implementation of real data fast fourier transform processor on field programmable gates array by Ahmed, Mohammed Kassim

“…In this work, the memorybased FFT processor, based on radix-4 FFT algorithm is implemented on Cyclone II Field Programmable Gates Array (FPGA). In order to program the FPGA, Verilog Hardware Description Language (Verilog HDL) is used. …”
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Linear array beampattern gain optimization techniques by Nagi F.

A Genetic Programming-Machine Learning Based Optimal Power Generation Approach for PV Arrays During Partial Shading by Satpathy P.R., Ramachandaramurthy V.K., Sharma R., Thanikanti S.B., Bhowmik P., Sinha S.

Design of a reconfigurable computing platform by Papu J.J., See O.H.

Implementation of PRINCE algorithm in FPGA by Abbas Y.A., Jidin R., Jamil N., Z'aba M.R., Rusli M.E., Tariq B.

“…Algorithms; Application programs; Cryptography; Field programmable gate arrays (FPGA); Hardware; Hardware security; High speed cameras; Integrated circuit design; Logic Synthesis; Security of data; Throughput; Architectural modeling; Block ciphers; Cryptographic algorithms; Hardware implementations; PRINCE; Software implementation; Very high speed integrated circuits; VHDL; Computer hardware description languages…”

PRINCE IP-core on Field Programmable Gate Arrays (FPGA) by Abbas Y.A., Jidin R., Jamil N., Z'aba M.R., Rusli M.E.

“…This study presents a high execution-speed and low-resource hardware IP-Core of PRINCE light weight block cipher on a Field Programmable Gate Arrays (FPGA). The new FPGA IP-core is to speed-up the performance of PRINCE, superseding software implementation that is typically slow and inefficient. …”