Search Results - (programmable OR (program OR programs)) five array

Matlab modeled for real time processing of partial discharge detection using fpga technology with giga hertz data acquisition by Emilliano, Chakrabarty C.K., Basri A., Ramasamy A.K., Devkumar S., Hock G.C., Badjian M.H.

Programming in C for foundation by Bakar, Noor Hasrina, Hassan, Noor Azimah, Idris, Mohd Norhaedir, Al-Shawabkeh, Mahmoud

“…Many advanced topics of “Arrays” and “Strings” are discussed. Search and sort as well as passing arrays between functions are demonstrated in chapter 5 the longest chapter in the book. …”
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FPGA configuration on Xilinx ML506 development board through the USB port in C/HDL by Kushal, Sreedhar

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High-bandwidth, low-power CMOS transistor based cab for field programmable analog array by Al-Bawri, Samir Salem, Obadi, Ameen, Hossain, Kabir, Abdulhameed, Abdullah, Jusoh, Muzammil, Sabapathy, Thennarasan, El-Din Hussein, Alaa, Al Gburi, Ahmed Jamal Abdullah

“…Simulation of the proposed CMOS Transistor Based CAB system is carried out using Tanner EDA Tools in 0.35 μm standard CMOS technology. The design uses a ±1.5 V power supply and results in maximum 3 dB bandwidth of 34.9 MHz and an approximate size of 0.0537 mm2. …”
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Design and implementation of a direct torque control of induction machine utilizing a digital signal processor and the field programmable gate arrays by Toh, C. L., Idris, Nik Rumzi, Yatim, A. H. M., Patkar, Fadzli

“…Employing both DSP and FPGA in motion control will This is because the lack of flexibility to modify or to adapt the give advantages of rapid prototyping and higher switching design to different types of motor drives, once the chip is built frequency in Direct Torque Control (DTC) drive. This paper [1], [5]. A special class of ASIC known as Field Programmable presents a high performance DTC induction motor drive with Gate Arrays (FPGA's) offers a realistic alternative. …”
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FPGA simulation of AD converter by using Giga Hertz speed data acquisition for partial discharge detection by Emilliano, Chakrabarty C.K., Basri A., Ramasamy A.K., Ping L.C.

Data structure uniqueness in Python programming language / Jamal Othman by Othman, Jamal

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Linear array beampattern gain optimization techniques by Nagi F.

A Genetic Programming-Machine Learning Based Optimal Power Generation Approach for PV Arrays During Partial Shading by Satpathy P.R., Ramachandaramurthy V.K., Sharma R., Thanikanti S.B., Bhowmik P., Sinha S.

Design of a reconfigurable computing platform by Papu J.J., See O.H.

Partial discharge detection system for counting PD signals in high voltage underground cable by using FPGA technology by Emilliano, Chakrabarty C.K., Ramasamy A.K., Ghani A.B.A.

VHDL simulation of reset automatic block, 64 bit latch block, and test complete blocks for PD detection circuit system using FPGA by Emilliano, Chakrabarty C.K., Ghani A.B.A., Ramasamy A.K.

Plasma Platform to Investigate Error Structure in the Electronic Components by M.V., Roshan, H., Sadeghi, S., Fazelpour, Lee, S., Yap, S. L.

“…This program was designed to introduce a plasma platform to examine the field programmable gate array (FPGA) of the link boards typically used at the CERN's Large Hadron Collider (LHC). …”
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Online partial discharge counting system using microcontroller PIC 16F877A and FPGA technology by Emilliano, Chakrabarty C.K., Ghani A.B.A., Ramasamy A.K.

Mobile application learning programme to learn fundamental of data structure using Gagne's learning style / Muhammad Syafiq Izzuddin Bahrin by Muhammad Syafiq Izzuddin Bahrin

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VHDL implementation for measurement of the distance test distribution pattern of the Tri-Axial magnetic probe for the PD detection circuit system by using 3 GHz ADC and FPGA by Emilliano, Chakrabarty C.K., Ghani A.B.A., Ramasamy A.K.

“…The research shall involve ISE Simulator version 10.1i (Xilinx) and ISE Xilinx Synthesized Technology (XST) using Very high integrated circuit Hardware Description Language (VHDL) programming to evaluate the use of Field Programming Gate Array (FPGA-Xilinx Virtex 5 ML501 Board) for the detection and counting of partial discharge signals in high voltage underground cable. …”

A Simple Approach of Space-vector Pulse Width Modulation Realization Based on Field Programmable Gate Array by Sutikno, Tole, Jidin, Auzani, Wong, Jenn Hwa, Nik Idris, Nik Rumzi

“…Employing a field programmable gate array to realize space-vector pulse width modulation is a solution to boost system performance. …”
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Embedded System Real Time Data Acquisition System Using FPGA Technology for Detection and Counting of PD Signal from PICO Pulse Generator by Emilliano, Chakrabarty C.K., Basri A., Ramasamy A.K., Suhendi N.

Implementation of PRINCE algorithm in FPGA by Abbas Y.A., Jidin R., Jamil N., Z'aba M.R., Rusli M.E., Tariq B.

Needleman wunsch implementation for SPAM/UCE inline filter by Tamil E.M., Idris M.Y.I., Thong C.M., Jali M.Z., Madihah Mohd Saudi