Search Results - (( verification implementation function algorithm ) OR ( java implementation towards algorithm ))

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  1. 1

    Rtl Implementation Of Secure Hash Algorithm 3 (Sha-3) Towards Smaller Area by Lim , Yen Ruen

    Published 2017
    “…Functionality verification is done using the test case provided by National Institute Standards and Technology (NIST). …”
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    Thesis
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  4. 4

    Implementing Station-to-Station protocol using Multi Prime RSA Cryptosystem / Muhammad Arif Musa Abdullah by Abdullah, Muhammad Arif Musa

    Published 2023
    “…The result will also produce the algorithm for implementing Multi Prime RSA cryptosystem into Station-to-Station protocol. …”
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    Student Project
  5. 5

    Implementation of locust inspired scheduling algorithm with huge number of servers for energy efficiency in a cloud datacenter by Azhar, Nur Huwaina

    Published 2019
    “…It does not consider the LACE algorithm implemented in huge number of server in one Cloud datacenter. …”
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    Thesis
  6. 6

    Design of a floating point unit for 32-bit 5 stage pipeline processor by Low, Wai Hau

    Published 2020
    “…The development project will start by studying the algorithm of addition on floating point numbers. The addition algorithm is then implemented in the FPU so that the FPU can perform addition on floating point numbers. …”
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    Final Year Project / Dissertation / Thesis
  7. 7

    Data modification attacks protection using blockchain signing and verification process in bluetooth low energy network / Aiman Nurrasyid Shahrul Kamil by Shahrul Kamil, Aiman Nurrasyid

    Published 2020
    “…This research proposes some of the blockchain function which is signing and verification process on the BLE (Bluetooth Low Energy) network environment due the security issue on the BLE itself using three different hash algorithm MD5, SHA1 and SHA256. …”
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    Thesis
  8. 8

    Network game (Literati) / Chung Mei Kuen by Chung, Mei Kuen

    Published 2003
    “…This thesis steps towards developing a networked game, Literati game system that supporting two players at one time. …”
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    Thesis
  9. 9

    A hardware implementation of Rivest-Shamir-Adleman co-processor for resource constrained embedded systems by Paniandi, Arul

    Published 2006
    “…The computation intensive modular multiplication operation is based on the Montgomery’s algorithm and implemented using systolic array architecture. …”
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    Thesis
  10. 10

    Adoption of machine learning algorithm for analysing supporters and non supporters feedback on political posts / Ogunfolajin Maruff Tunde by Ogunfolajin Maruff , Tunde

    Published 2022
    “…The method was implemented using Java and the results of the simulation were evaluated using five standard performance metrics: accuracy, AUC, precision, recall, and f-Measure. …”
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    Thesis
  11. 11

    Partial encryption of compressed images employing FPGA by Reaz, Mamun Bin Ibne Ibne, Ibrahimy, Muhammad Ibn, Mohd-Yasin, F., Tan, SiewLin, Tan, HungKhoon

    Published 2005
    “…In this paper, we present the realization of of partial encryption of compressed images on Altera FLEX10K FPGA device that allows for efficient hardware implementation. The compression algorithm decomposes images into several different parts. …”
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    Proceeding Paper
  12. 12

    An intelligent framework for modelling and active vibration control of flexible structures by Mohd. Hashim, Siti Zaiton

    Published 2004
    “…The first controller design is formulated so as to allow on-line modeling, controller design and implementation and thus, yield a self-tuning control algorithm. …”
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    Thesis
  13. 13

    Development of web-based GIS for traffic management system with obstacle avoidance technique using open source software by Nik Yusoff, Nik Mohd Ramli

    Published 2014
    “…In order to calculate the shortest path between two nodes, Dijkstra algorithm was utilized. Obstacle avoidance technique was implemented in this algorithm to avoid the congested areas. …”
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    Thesis
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    A Hybrid Rough Sets K-Means Vector Quantization Model For Neural Networks Based Arabic Speech Recognition by Babiker, Elsadig Ahmed Mohamed

    Published 2002
    “…A vector quantization model that incorporate rough sets attribute reduction and rules generation with a modified version of the K-means clustering algorithm was developed, implemented and tested as a part of a speech recognition framework, in which the Learning Vector Quantization (LVQ) neural network model was used in the pattern matching stage. …”
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    Thesis
  16. 16

    AUTO-MANAGE PARKING SYSTEM (AMPS) by KHAIRUDDIN, MUHAMMAD AMIRUL SYAFIQ

    Published 2019
    “…For functionality, the system only able to serve its basic function and it still need few improvements. …”
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    Final Year Project
  17. 17

    Investigation on pattern based Algorithm for division by a constant number using Verilog code for optimization on the Nelust results by Fouziah Md Yassin, Ag Asri Ag Ibrahim, Zaturrawiah Ali Omar, Saturi Baco

    Published 2015
    “…The methodology of this research are involving design specification, high level design using C++, RTL level description using Verilog, functional verification and logic synthesis using two different technology library. …”
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    Research Report
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    Embedded system for indoor guidance parking with Dijkstra’s algorithm and ant colony optimization by Mohammad Ata, Karimeh Ibrahim

    Published 2019
    “…The circuits have been designed by proteus, the microcontrollers have been programmed by micro C, and the Graphical User Interface (GUI) has been implemented in Java. Few by electronic components such as RFID, multiplexer, XBee, and servo motors have been used to realize the system. …”
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    Thesis
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    Case driven TLC model checker analysis in energy scenario by Shkarupylo, Vadym, Blinov, Ihor V., Dusheba, Valentyna, Alsayaydeh, Jamil Abedalrahim Jamil

    Published 2023
    “…Addressing current situation in Ukraine, an energy domain is among the topical spheres, where safety critical business processes take place. To foster the functional safety of corresponding program-algorithmic solutions, the model checking techniques and related tools are applied to the formal specifications of named solutions. …”
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    Conference or Workshop Item
  20. 20

    Low power pipelined FFT processor architecture on FPGA by Mohd Hassan, Siti Lailatul, Sulaiman, Nasri, Abdul Halim, Ili Shairah

    Published 2018
    “…Fast Fourier Transform (FFT) processor is the hardware implementation for FFT algorithms for Discrete Fourier Transform (DFT) which compute any signal in time domain to frequency domain. …”
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    Conference or Workshop Item