Search Results - (( programming using digital algorithm ) OR ( java simulation optimization algorithm ))
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Attribute reduction based scheduling algorithm with enhanced hybrid genetic algorithm and particle swarm optimization for optimal device selection
Published 2022“…The simulation is implemented with iFogSim and java programming language. …”
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2
Enhancement of Ant Colony Optimization for Grid Job Scheduling and Load Balancing
Published 2011“…Global pheromone update is performed after the completion of processing the jobs in order to reduce the pheromone value of resources. A simulation environment was developed using Java programming to test the performance of the proposed EACO algorithm against existing grid resource management algorithms such as Antz algorithm, Particle Swarm Optimization algorithm, Space Shared algorithm and Time Shared algorithm, in terms of processing time and resource utilization. …”
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3
Ant colony optimization algorithm for load balancing in grid computing
Published 2012“…The proposed algorithm is known as the enhance ant colony optimization (EACO). …”
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Monograph -
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OPTIMIZED MIN-MIN TASK SCHEDULING ALGORITHM FOR SCIENTIFIC WORKFLOWS IN A CLOUD ENVIRONMENT
Published 2023“…To achieve this, we propose a new noble mechanism called Optimized Min-Min (OMin-Min) algorithm, inspired by the Min-Min algorithm. …”
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Embedded system for indoor guidance parking with Dijkstra’s algorithm and ant colony optimization
Published 2019“…This study proposes a car parking management system which applies Dijkstra’s algorithm, Ant Colony Optimization (ACO) and Binary Search Tree (BST) in structuring a guidance system for indoor parking. …”
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6
Features selection for intrusion detection system using hybridize PSO-SVM
Published 2016“…Hybridize Particle Swarm Optimization (PSO) as a searching algorithm and support vector machine (SVM) as a classifier had been implemented to cope with this problem. …”
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7
Implementing frequency translation by adapting digital phase shifter for WCDMA using XILINX: article
Published 2009“…Algorithm of the design will be written in VHDL programming Language which then simulated through Modelsim SE 6.3f. …”
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Resource management in grid computing using ant colony optimization
Published 2011“…Resources with high pheromone value are selected to process the submitted jobs.Global pheromone update is performed after completion processing the jobs in order to reduce the pheromone value of resources.A simulation environment was developed using Java programming to test the performance of the proposed EACO algorithm against other ant based algorithm, in terms of resource utilization.Experimental results show that EACO produced better grid resource management solution.…”
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Monograph -
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Implementation frequency translation by adapting digital phase shifter for WCDMA using XILINX
Published 2009“…Algorithm of the design will be written in VHDL programming Language which then simulated through Modelsim SE 6.3f. …”
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Student Project -
10
Implementation of locust inspired scheduling algorithm with huge number of servers for energy efficiency in a cloud datacenter
Published 2019“…Cloudsim is used as Discrete Event Simulation tool and Java as coding language to evaluate LACE algorithm. …”
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Optimization of Digital Electronic Circuit Structure Design Using Genetic Algorithm
Published 2008“…ODCSD is a digital circuit structure design simulation program. …”
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Solving Sudoku puzzles in Binary Integer Linear Programming using Branch and Bound algorithm / Ahida Waliyyah Ahmad Fuad
Published 2024“…This study explores the application of a Binary Integer Linear Programming (BILP) model combined with the Branch and Bound (B&B) algorithm to solve Sudoku puzzles. …”
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13
Booth’s Algorithm Design Using Field Programmable Gate Array
Published 2014“…The high speed operation and less space and energy required had made the digital devices more preferred.This project is to design digital system which performed fixed point Booth Multiplier Algorithm where the design system would be developed using hardware description language (HDL),in this case,VHDL (VHSIC Hardware Description Language),VHSIC stands for Very High Speed Integrated Circuit.In this project would be used Xilinx ISE 10.1which is the software used to designed digital system for Xilinx manufactured FPGA board.In Xilinx have two main languages which are VHDL and Verilog.For design Booth’s Multiplier Algorithm we used Verilog code which is has to create the program module and test bench.In that case,to design digital system will have input and output which is input is 8 bits and output is 16 bits.Finally, it is proven that the system created can calculate and yield a fixed point multiplied output of the input value. …”
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Study Of Modified Training Algorithm For Optimized Convergence Speed Of Neural Network
Published 2016“…In this research, a hand-written character recognition model are implemented in C++ programming with ability to classify digits 0, 1, 2, and 3. …”
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15
Simulation of LMS algorithm for active noise cancellation / Ahmad Khairul Hafiz Abdullah
Published 2012“…An active noise control is used adaptive filter to reduce noise. Adaptive filter is a digital filter combine with adaptive algorithm. …”
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16
Data Hiding Techniques In Digital Images
Published 2003“…After all these studies, one of the algorithms in the masking technique is developed and implemented using JAVA program to embed message into true color image with a good quality and higher capacity. …”
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Computational Thinking (Algorithms) Through Unplugged Programming Activities: Exploring Upper Primary Students’ Learning Experiences
Published 2021“…CT skills can be taught via computing activities that involve different types of programming tasks or via Unplugged Programming Activities (UPA) that do not involve the use of digital devices to represent and deliver programming concepts. …”
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Recognition of isolated elements picture using backpropagation neural network / Melati Sabtu
Published 2005“…Images that capture using digital camera will perform through the algorithm to classified images. …”
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19
Encryption using FPGA
Published 2008“…The AES algorithm is capable of using cryptographic keys of 128, 192, and 256 bits, this project implements the 128 bit standard on a Field Programming Gate Array (FPGA) using the VHDL, a hardware description language.…”
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Undergraduates Project Papers -
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