Search Results - (( programming language descriptive algorithm ) OR ( java data optimization algorithm ))

CAR TRACTION CONTROL SYSTEM by MOHD ISMAIL, ADIBAH

“…It is useful when the driving condition is uncontrolled. The core programming language which will be used as the hardware description language is VHSIC Hardware Description Language (VHDL). …”
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Fuzzy modeling using Bat Algorithm optimization for classification by Noor Amidah, Ahmad Sultan

“…A Sazonov Engine which is a fuzzy java engine is use to apply Bat Algorithm in the experiment. …”
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Attribute reduction based scheduling algorithm with enhanced hybrid genetic algorithm and particle swarm optimization for optimal device selection by Nwogbaga, Nweso Emmanuel, Latip, Rohaya, Affendey, Lilly Suriani, Abdul Rahiman, Amir Rizaan

“…Therefore, in this paper, we proposed Dynamic tasks scheduling algorithm based on attribute reduction with an enhanced hybrid Genetic Algorithm and Particle Swarm Optimization for optimal device selection. …”
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Booth’s Algorithm Design Using Field Programmable Gate Array by Ab Hadi, Nik Azran, A Aziz, Khairul Azha, Hashim, Nik Mohd Zarifie, Omar, Muhammad Shukri, Jaafar, Anuar

“…The high speed operation and less space and energy required had made the digital devices more preferred.This project is to design digital system which performed fixed point Booth Multiplier Algorithm where the design system would be developed using hardware description language (HDL),in this case,VHDL (VHSIC Hardware Description Language),VHSIC stands for Very High Speed Integrated Circuit.In this project would be used Xilinx ISE 10.1which is the software used to designed digital system for Xilinx manufactured FPGA board.In Xilinx have two main languages which are VHDL and Verilog.For design Booth’s Multiplier Algorithm we used Verilog code which is has to create the program module and test bench.In that case,to design digital system will have input and output which is input is 8 bits and output is 16 bits.Finally, it is proven that the system created can calculate and yield a fixed point multiplied output of the input value. …”
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Encryption using FPGA by Nor Robaini, Ibrahim

“…The AES algorithm is capable of using cryptographic keys of 128, 192, and 256 bits, this project implements the 128 bit standard on a Field Programming Gate Array (FPGA) using the VHDL, a hardware description language.…”
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A random search based effective algorithm for pairwise test data generation by Sabira, Khatun, K. F., Rabbi, Che Yahaya, Yaakub, Klaib, Mohammad F. J.

“…This paper proposes an effective random search based pairwise test data generation algorithm named R2Way to optimize the number of test cases. …”
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Scalable approach for mining association rules from structured XML data by Abazeed, Ashraf Riad, Mamat, Ali, Sulaiman, Md. Nasir, Ibrahim, Hamidah

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EasyA: Easy and effective way to generate pairwise test data by Rabbi, Khandakar Fazley, Sabira, Khatun, Che Yahaya, Yaakub, Klaib, Mohammad F. J.

“…This paper proposes a matrix based calculation for pairwise test data generation algorithm named EasyA to optimize the number of test cases. …”
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An ensemble learning method for spam email detection system based on metaheuristic algorithms by Behjat, Amir Rajabi

“…In the second phase, a classifier ensemble learning model is proposed consisting of separate outputs: (i) To select a relevant subset of original features based on Binary Quantum Gravitational Search Algorithm (QBGSA), (ii) To mine data streams using various data chunks and overcome a failure of single classifiers based on SVM, MLP and K-NN algorithms. …”
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Implementation of PRINCE algorithm in FPGA by Abbas Y.A., Jidin R., Jamil N., Z'aba M.R., Rusli M.E., Tariq B.

“…Algorithms; Application programs; Cryptography; Field programmable gate arrays (FPGA); Hardware; Hardware security; High speed cameras; Integrated circuit design; Logic Synthesis; Security of data; Throughput; Architectural modeling; Block ciphers; Cryptographic algorithms; Hardware implementations; PRINCE; Software implementation; Very high speed integrated circuits; VHDL; Computer hardware description languages…”

Features selection for intrusion detection system using hybridize PSO-SVM by Tabaan, Alaa Abdulrahman

“…Hybridize Particle Swarm Optimization (PSO) as a searching algorithm and support vector machine (SVM) as a classifier had been implemented to cope with this problem. …”
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Enhanced bibliographic data retrieval and visualization using query optimization and spectral centrality measure by Ramasamy, Chitra, Zolkepli, Maslina

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Voice-Assisted News App using Natural Language Processing by Suhail, Ahmed Khan, Chitra, K.E., Wan Nor Al-Ashekin, Wan Husin

“…Through integration with diverse news sources and the application of sophisticated algorithms, the program generates an individualized news stream for every user, ensuring they receive the latest and most relevant information. …”
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Optimal forwarding routing protocol in ipv6-based wireless sensor network by Jamil, Ansar

“…In WSNs, TinyOS is the most widely used operating system. Thus, programming code of the OF routing protocol algorithm is written using NesC language, which is a high level programming language that emulates the syntax and functionality of hardware description languages, and provides components for communication, thread coordination, and hardware abstraction. …”
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Web page design for electronic commerce / Lee Fong Wai by Lee , Fong Wai

“…The sixth part covers the system implementation that involved the transformation of modules and algorithm into implementable commands by using the specified programming languages. …”
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Implementation of quantization in MPEG-2 encoder using Xilinx FPGA technology by Abdul Razak, Razilawati

“…Very High Speed Hardware Description Language (VHDL) is used to program the behavioral logic design of quantization. …”
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Facilitating English Language teaching through AI- based drama in Palestine by Bsharat, Tahani, Sheikh Ahmad, Ismail

“…Utilizing SPSS (V. 23), descriptive statistics, independent sample t- tests, and ANOVA tests were employed to analyze the data. …”
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Twofold Integer Programming Model for Improving Rough Set Classification Accuracy in Data Mining. by Saeed, Walid

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Smart student timetable planner by Wong, Xin Tong

“…Course data is managed in CSV format, parsed into JSON for fast processing, while sessionStorage and localStorage handle user data within active sessions. …”
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Design and implementation of real data fast fourier transform processor on field programmable gates array by Ahmed, Mohammed Kassim

“…In order to program the FPGA, Verilog Hardware Description Language (Verilog HDL) is used. …”
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