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  1. 1
    Implementation Of FPGA Based Encryption Chip Using VHD - Data Encryption Standard (DES) Algorithm

    Implementation Of FPGA Based Encryption Chip Using VHD - Data Encryption Standard (DES) Algorithm by Lim, Mui Liang

    Published 2006
    “…There are many researchers used Data Encryption Standard (DES) Algorithm to implement in FPGAs. …”
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  2. 2
    Cyber Threat Extenuation for Substation Data Communication: Evaluation of Encrypt-Authenticator Prototype for IEC 60870-5 Data

    Cyber Threat Extenuation for Substation Data Communication: Evaluation of Encrypt-Authenticator Prototype for IEC 60870-5 Data by Jidin R., Jamil N., Abdul Rahim A.A.

    Published 2023
    Conference Paper
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  3. 3
    Enhancing performance of XTS cryptography mode of operation using parallel design

    Enhancing performance of XTS cryptography mode of operation using parallel design by Ahmed Alomari, Mohammad

    Published 2009
    “…Performance evaluation shows that XTS exhibits faster speed when an RC6 encryption algorithm is used, compared to other encryption algorithms such as AES and Twofish. …”
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  4. 4
    Design of an advanced encryption standard crypto-processor core for field programmable gate array implementation

    Design of an advanced encryption standard crypto-processor core for field programmable gate array implementation by Ismail, Mohd. Izuan

    Published 2006
    “…The proposed AES Crypto-Processor accelerates the AES algorithm in reconfigurable Field Programmable Gate Arrays (FPGA). …”
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  5. 5
    Design and Implementation of Advanced Encryption Standard Using Verilog HDL

    Design and Implementation of Advanced Encryption Standard Using Verilog HDL by Shamsiah, Suhaili, Rene Brooke, Fredrick, Zainah, Md. Zain, Norhuzaimin, Julai

    Published 2020
    “…The focus of this paper is to match with the existing cryptography algorithm, 128-bit Advanced Encryption Algorithm and improving the processing speed for the design with hardware implementation. …”
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  6. 6
    Design and implementation of advanced encryption standard using verilog HDL

    Design and implementation of advanced encryption standard using verilog HDL by Shamsiah, Suhaili, Fredrick, Rene Brooke, Zainah, Md. Zain, Norhuzaimin, Julai

    Published 2022
    “…The focus of this paper is to match with the existing cryptography algorithm, 128-bit Advanced Encryption Algorithm and improving the processing speed for the design with hardware implementation. …”
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  7. 7
    Attribute reduction based scheduling algorithm with enhanced hybrid genetic algorithm and particle swarm optimization for optimal device selection

    Attribute reduction based scheduling algorithm with enhanced hybrid genetic algorithm and particle swarm optimization for optimal device selection by Nwogbaga, Nweso Emmanuel, Latip, Rohaya, Affendey, Lilly Suriani, Abdul Rahiman, Amir Rizaan

    Published 2022
    “…The simulation is implemented with iFogSim and java programming language. …”
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  8. 8
    Enhancement of Ant Colony Optimization for Grid Job Scheduling and Load Balancing

    Enhancement of Ant Colony Optimization for Grid Job Scheduling and Load Balancing by Husna, Jamal Abdul Nasir

    Published 2011
    “…Global pheromone update is performed after the completion of processing the jobs in order to reduce the pheromone value of resources. A simulation environment was developed using Java programming to test the performance of the proposed EACO algorithm against existing grid resource management algorithms such as Antz algorithm, Particle Swarm Optimization algorithm, Space Shared algorithm and Time Shared algorithm, in terms of processing time and resource utilization. …”
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  9. 9
    Ant colony optimization algorithm for load balancing in grid computing

    Ant colony optimization algorithm for load balancing in grid computing by Ku-Mahamud, Ku Ruhana, Mohamed Din, Aniza

    Published 2012
    “…The proposed algorithm is known as the enhance ant colony optimization (EACO). …”
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  10. 10
    FPGA based Twofish Algorithm

    FPGA based Twofish Algorithm by Muhammad Imran, Ahmad, Mohd Nazrin, Md Isa, Abdul Halis, Abdul Aziz, Mohd Fisol, Osman

    Published 2009
    “…This paper presents the architecture of Twofish algorithm implemented with field programmable gate array (FPGA). …”
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  11. 11
    Implementation of PRINCE algorithm in FPGA

    Implementation of PRINCE algorithm in FPGA by Abbas Y.A., Jidin R., Jamil N., Z'aba M.R., Rusli M.E., Tariq B.

    Published 2023
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  12. 12
    OPTIMIZED MIN-MIN TASK SCHEDULING ALGORITHM FOR SCIENTIFIC WORKFLOWS IN A CLOUD ENVIRONMENT

    OPTIMIZED MIN-MIN TASK SCHEDULING ALGORITHM FOR SCIENTIFIC WORKFLOWS IN A CLOUD ENVIRONMENT by Murad S.S., Badeel R., Alsandi N.S.A., Alshaaya R.F., Ahmed R.A., Muhammed A., Derahman M.

    Published 2023
    “…To achieve this, we propose a new noble mechanism called Optimized Min-Min (OMin-Min) algorithm, inspired by the Min-Min algorithm. …”
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  13. 13
    Design of Cryptographic Hardware Module Using FPGA

    Design of Cryptographic Hardware Module Using FPGA by Muhammad Imran, Ahmad, Abdul Rahman, Mohd Saad, Mohd Nazrin, Md Isa, Mohd Taufik, Jusoh, Amir Razif Arief, Jamil Abdullah

    Published 2009
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  14. 14
    Embedded system for indoor guidance parking with Dijkstra’s algorithm and ant colony optimization

    Embedded system for indoor guidance parking with Dijkstra’s algorithm and ant colony optimization by Mohammad Ata, Karimeh Ibrahim

    Published 2019
    “…This study proposes a car parking management system which applies Dijkstra’s algorithm, Ant Colony Optimization (ACO) and Binary Search Tree (BST) in structuring a guidance system for indoor parking. …”
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  15. 15
    Features selection for intrusion detection system using hybridize PSO-SVM

    Features selection for intrusion detection system using hybridize PSO-SVM by Tabaan, Alaa Abdulrahman

    Published 2016
    “…Hybridize Particle Swarm Optimization (PSO) as a searching algorithm and support vector machine (SVM) as a classifier had been implemented to cope with this problem. …”
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  16. 16
    Cryptographic protection of block-oriented storage devices using AES-XTS in FPGA

    Cryptographic protection of block-oriented storage devices using AES-XTS in FPGA by Ahmed, Shakil

    Published 2013
    “…Also the parallel AES-XTS encryption and decryption design were used to develop integrated chip of AES-XTS on FPGA. …”
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  17. 17
    Resource management in grid computing using ant colony optimization

    Resource management in grid computing using ant colony optimization by Ku-Mahamud, Ku Ruhana, Mohamed Din, Aniza

    Published 2011
    “…Resources with high pheromone value are selected to process the submitted jobs.Global pheromone update is performed after completion processing the jobs in order to reduce the pheromone value of resources.A simulation environment was developed using Java programming to test the performance of the proposed EACO algorithm against other ant based algorithm, in terms of resource utilization.Experimental results show that EACO produced better grid resource management solution.…”
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  18. 18
    Implementation of locust inspired scheduling algorithm with huge number of servers for energy efficiency in a cloud datacenter

    Implementation of locust inspired scheduling algorithm with huge number of servers for energy efficiency in a cloud datacenter by Azhar, Nur Huwaina

    Published 2019
    “…Cloudsim is used as Discrete Event Simulation tool and Java as coding language to evaluate LACE algorithm. …”
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  19. 19
    The memory-less method of generating multiplicative inverse values for S-box in AES algorithm

    The memory-less method of generating multiplicative inverse values for S-box in AES algorithm by Siti Zarina, Md Naziri, Norina, Idris

    Published 2009
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  20. 20
    Implementation of High Speed Large Integer Multiplication Algorithm on Contemporary Architecture

    Implementation of High Speed Large Integer Multiplication Algorithm on Contemporary Architecture by Chang, Boon Chiao

    Published 2018
    “…CPU implementations are becoming less efficient in handling the computation of crypto algorithms. Hence, other contemporary processor architectures such as GPU and FPGA have become popular alternative to speed up the computation in recent years.This dissertation first discusses several existing large integer multiplication algorithms and reviews different methods used to implement thediscussed algorithms done by other researchers in both Graphic Processing Unit (GPU) and Field Programmable Gate Array (FPGA).Compared to GPU, FPGA offered more low level design and development to the implementation. …”
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