Search Results - (( programmes _ utilization algorithm ) OR ( java automatic optimization algorithm ))

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  1. 1

    Automatic Number Plate Recognition on android platform: With some Java code excerpts by ., Abdul Mutholib, Gunawan, Teddy Surya, Kartiwi, Mira

    Published 2016
    “…Hence, the objective of this research is to propose suitable and optimize algorithm for ANPR system on Android mobile phone. …”
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    Book
  2. 2

    Embedded system for indoor guidance parking with Dijkstra’s algorithm and ant colony optimization by Mohammad Ata, Karimeh Ibrahim

    Published 2019
    “…This study proposes a car parking management system which applies Dijkstra’s algorithm, Ant Colony Optimization (ACO) and Binary Search Tree (BST) in structuring a guidance system for indoor parking. …”
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    Thesis
  3. 3

    An ensemble learning method for spam email detection system based on metaheuristic algorithms by Behjat, Amir Rajabi

    Published 2015
    “…Feature subset selection and classifier ensemble learning are familiar techniques with high ability to optimize above problems. Recently, various techniques based on different algorithms have been developed. …”
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    Thesis
  4. 4

    IMAGE PROCESSING ALGORITHMS ON FPGA by MOHAMED SHUKOR, MOHAMED NASIR

    Published 2007
    “…The objective of this project is to construct a real time hardware image processing system which based on Field Programmable Gate Array (FPGA). The chosen image processing algorithms are implemented on two systems which are Color Filtering System and Edge Detection System. …”
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    Final Year Project
  5. 5

    Real time motorcycle image detections on field programmable gate array by Mat Nong, Mohd Ali, Osman, Rosiah, Md Yusof, Juraina, Mohd Sidek, Roslina

    Published 2015
    “…This paper describes a process to generate a bounding box and analyzes the system performance in tracking the image and hardware utilize. This paper also discussed on image processing algorithm used and embedded techniques involved. …”
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    Conference or Workshop Item
  6. 6
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    Agent-based extraction algorithm for computational problem solving by Rajabi, Maryam

    Published 2015
    “…On the other hand, agent-based model offers a good method to solve complex computational problems. Therefore, utilizing the agent-based featured agents for this purpose is a benefit with the aim of helping novice programmers to understand the CPS without knowing the programming language. …”
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    Thesis
  8. 8

    Design and implementation of real data fast fourier transform processor on field programmable gates array by Ahmed, Mohammed Kassim

    Published 2015
    “…In this work, the memorybased FFT processor, based on radix-4 FFT algorithm is implemented on Cyclone II Field Programmable Gates Array (FPGA). …”
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    Thesis
  9. 9

    MINIMIZATION OF RESOURCE UTILIZATION FOR A REAL-TIME DEPTH-MAP COMPUTATIONAL MODULE ON FPGA by NGO , NGO HUY TAN

    Published 2011
    “…The algorithm is computationally intensive and therefore more effective to be implemented on hardware such as the Field Programmable Gate Array (FPGA). …”
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    Thesis
  10. 10

    An FPGA based embedded vision system for real-time motion detection by AlDahoul, Nouar, Htike@Muhammad Yusof, Zaw Zaw

    Published 2015
    “…The proposed algorithm was implemented on the FPGA with a 25 MHz crystal. …”
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    Proceeding Paper
  11. 11

    Implementation of Color Filtering on FPGA by Mohd Shukor, Mohd Nasir, Lo, H. H., Sebastian, Patrick

    Published 2007
    “…The objective of this paper is to construct a real time hardware image processing system on Field Programmable Gate Array (FPGA). The chosen image processing algorithm is a single Color Filtering algorithm. …”
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    Conference or Workshop Item
  12. 12
  13. 13

    FPGA implementation of variable precision Euclid’s GCD algorithm by Al-Haija, Qasem Abu, Syed Ahmad Abdul Rahman, Sharifah Mumtazah, Alfarran, Islam

    Published 2017
    “…The proposed implementation was benchmarked using seven field programmable gate arrays (FPGA) chip families (i.e., one Altera chip and six Xilinx chips) and reported on four cost complexity factors: the maximum frequency, the total delay values, the hardware utilization and the total FPGA thermal power dissipation. …”
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    Article
  14. 14
  15. 15

    Low area Programmable Memory Built-In Self-Test (PMBIST) for small embedded ram cores / Nur Qamarina Mohd Noor by Mohd Noor, Nur Qamarina

    Published 2013
    “…A technique called clustering which is applied to other architectures such as VLIW processor and FPGA architecture is utilized in this study to achieve low area programmable memory BIST (P-MBIST). …”
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    Thesis
  16. 16

    An Efficient Implementation of LED Block Cipher on FPGA by Al-Shatari, M., Hussin, F.A., Aziz, A.A., Witjaksono, G., Rohmad, M.S., Tran, X.-T.

    Published 2019
    “…In this paper, the focus is on the 64-bit key with 64-bit block size. This algorithm is implemented on various Field Programmable Gate Array (FPGA) devices. …”
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    Conference or Workshop Item
  17. 17

    Optimum Material Removal in Electrical Discharge Machining through Advanced Control Integration of PSoC Microcontroller by Matthias Tiong Foh Thye, Leong Kah Meng, Mohd Azahar Che Abdullah, Jaysuman Pusppanathan, Abd Rahim Mat Sidek, Bentantya Nugroho

    Published 2025
    “…Electrical Discharge Machining (EDM) is an advanced non-traditional method for precision material removal using repeated electrical discharges. It utilizes a programmable tool electrode to intricately shape designs. …”
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    Article
  18. 18

    Design and implementation of multimedia digital matrix system by Chui, Yew Leong, Ramli, Abdul Rahman, Perumal, Thinagaran, Sulaiman, Mohd Yusof, Ali, Mohd Liakot

    Published 2005
    “…Due to the issues of signal integrity in high-speed digital design, a new adaptive channel synchronization algorithm has been developed. The algorithm, named as hybrid-reset algorithm utilizes the nature of asynchronous reset to compensate the drawback of synchronous counter for phase detection. …”
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    Conference or Workshop Item
  19. 19

    Design of a reconfigurable computing platform by Papu J.J., See O.H.

    Published 2023
    “…The RCP utilizes Impulse CoDeveloper which is an electronic system level (ESL) design tool that compiles sequential applications/algorithms in C to synthesizable HDL. …”
    Conference paper
  20. 20

    Securing electrical substation's wireless messaging with a lightweight crypto-algorithm IP core by Abbas Y.A., Jidin R., Jami N., Z'aba M.R.

    Published 2023
    “…The crypto-algorithm has been implemented within an environment of microprocessor system on a XILINX Field Programmable Logic Arrays chip. …”
    Conference Paper