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  1. 1
    FPGA Implementation of Emergency Door Car Entry System

    FPGA Implementation of Emergency Door Car Entry System by Zaini Sulaiman

    Published 2008
    “…Emergency door car entry system can be implemented using Field Programmable Gate Array (FPGA) board. FPGA board is a board that can be programmed using source code to run the application that has been downloaded into it. …”
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    Learning Object
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  2. 2
    RISC-V instruction set extension on blockchain application

    RISC-V instruction set extension on blockchain application by Cheong , Kin Seng

    Published 2024
    “…This would greatly shorten the instructions used by the algorithms and improved the execution time of the programmes. …”
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    Final Year Project / Dissertation / Thesis
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  3. 3
    Booth’s Algorithm Design Using Field Programmable Gate Array

    Booth’s Algorithm Design Using Field Programmable Gate Array by Ab Hadi, Nik Azran, A Aziz, Khairul Azha, Hashim, Nik Mohd Zarifie, Omar, Muhammad Shukri, Jaafar, Anuar

    Published 2014
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  4. 4
    Investigation on the dynamic of computation of semi autonomous evolutionary computation for syntactic optimization of a set of programming codes

    Investigation on the dynamic of computation of semi autonomous evolutionary computation for syntactic optimization of a set of programming codes by Mohammad Sigit Arifianto, Tze, Kenneth Kin Teo, Liau, Chung Fan, Liawas Barukang, Zaturrawiah Ali Omar

    Published 2007
    “…Since programming is not very exact and can be considered partially art then the Genetic Algorithm is not designed to be fully autonomous and programmers hand still have to be there, but with much reduced work.…”
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  5. 5
    Simplified VHDL Coding of Modified Non-Restoring Square Root Calculator

    Simplified VHDL Coding of Modified Non-Restoring Square Root Calculator by Jidin, Auzani

    Published 2012
    “…This paper offers universal and shortest VHDL coding of modified non-restoring square root calculator. …”
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  6. 6
    Design Methodology and Analysis of Hash Function based-on Field Programmable Gate Array for Hash-based Message Authentication Code Application

    Design Methodology and Analysis of Hash Function based-on Field Programmable Gate Array for Hash-based Message Authentication Code Application by SHAMSIAH BINTI, SUHAILI

    Published 2025
    “…All these design methodologies aim to confirm the effect of HDL coding style on the performance of hardware algorithms implemented on FPGA. …”
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  7. 7
    Development of low power viterbi decoder on complex programmable logic device platform

    Development of low power viterbi decoder on complex programmable logic device platform by Abu, Mohd Azlan

    Published 2018
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  8. 8
    Towards Maximising Hardware Resources and Design Efficiency via High-Speed Implementation of HMAC based on SHA-256 Design

    Towards Maximising Hardware Resources and Design Efficiency via High-Speed Implementation of HMAC based on SHA-256 Design by Shamsiah, Suhaili, Norhuzaimin, Julai, Rohana, Sapawi, Nordiana, Rajaee

    Published 2024
    “…This article analyses a fast implementation of the Hash-based Message Authentication Code (HMAC), which uses its algorithm to ensure the validity and integrity of data to optimise hardware efficiency and design efficacy using the SHA-256 algorithm. …”
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  9. 9
    Towards Maximising Hardware Resources and Design Efficiency via High-Speed Implementation of HMAC based on SHA-256 Design

    Towards Maximising Hardware Resources and Design Efficiency via High-Speed Implementation of HMAC based on SHA-256 Design by Shamsiah, Suhaili, Norhuzaimin, Julai, Rohana, Sapawi, Nordiana, Rajaee

    Published 2024
    “…This article analyses a fast implementation of the Hash-based Message Authentication Code (HMAC), which uses its algorithm to ensure the validity and integrity of data to optimise hardware efficiency and design efficacy using the SHA-256 algorithm. …”
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  10. 10
    Agent-based extraction algorithm for computational problem solving

    Agent-based extraction algorithm for computational problem solving by Rajabi, Maryam

    Published 2015
    “…Additionally, IPO_Agent not only produces the same PAC’s output results, but also generates module number and represents these results in another window. Finally,Algorithm_Agent employs the extracted information provided by IPO_Agent to produce the pseudo-code of the given problem and shows it in separate window. …”
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  11. 11
    Design of a reconfigurable computing platform

    Design of a reconfigurable computing platform by Papu J.J., See O.H.

    Published 2023
    “…The RCP utilizes Impulse CoDeveloper which is an electronic system level (ESL) design tool that compiles sequential applications/algorithms in C to synthesizable HDL. A customized platform support package (PSP) was developed within the Impulse CoDeveloper environment to enable the Impulse tools to automatically generate the HDL files and C source codes with supported hardware and software interfaces that is targeted for the RCP. …”
    Conference paper
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  12. 12
    Reusable data-path architecture for encryption-then-authentication on FPGA

    Reusable data-path architecture for encryption-then-authentication on FPGA by Abbas Y.A., Jidin R., Jamil N., Zaba M.R.

    Published 2023
    “…For this proposed reusable data-path, we have chosen LED algorithm for encryption and then PHOTON to generate the MAC code. …”
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  13. 13
    Implementation Of FPGA Based Encryption Chip Using VHD - Data Encryption Standard (DES) Algorithm

    Implementation Of FPGA Based Encryption Chip Using VHD - Data Encryption Standard (DES) Algorithm by Lim, Mui Liang

    Published 2006
    “…The hardware based of encryption chip become realizable with Field Programmable Gate Arrays (FPGAs). There are many researchers used Data Encryption Standard (DES) Algorithm to implement in FPGAs. …”
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  14. 14
    The design of viterbi decoder for low power consumption space time trellis code without adder architecture using RTL model

    The design of viterbi decoder for low power consumption space time trellis code without adder architecture using RTL model by Abu, Mohd Azlan, Harun, Harlisya, Harmin, Mohammad Yazdi, Abdul Wahab, Noor Izzri, Abdul Kadir, Muhd Khairulzaman

    Published 2016
    “…Purpose – This paper aims to describe the real-time design and implementation of a Space Time Trellis Code decoder using Altera Complex Programmable Logic Devices (CPLD). …”
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  15. 15
    Compiler-based prefetching algorithm for recursive data structure

    Compiler-based prefetching algorithm for recursive data structure by Anuar, Nurulhaini

    Published 2007
    “…This best algorithm consists of greedy prefetching and prefetch array algorithms. …”
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  16. 16
    Solution For Nonlinear Riccati Equation By Block Method

    Solution For Nonlinear Riccati Equation By Block Method by Rasedee, AFN, Ijam, HM, Sathar, MHA, Ishak, N, Hamzah, SR, Sahrim, M, Ismail I.

    Published 2024
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  17. 17
    Framework of Designing Multiple Microcontroller Based Applications

    Framework of Designing Multiple Microcontroller Based Applications by Selvakumar, Raja Saravana Kumar, Kamarul Hawari, Ghazali, Nik Mohd Kamil, Nik Yusof

    Published 2011
    “…These are presented in the second part of the paper describing the software part of the framework, which besides programming tools also discusses the code development tools. The stress is given to the use of assembly code and high-level tools, where the algorithms are described in the form of different graphical notations, i.e. block diagrams. …”
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    Conference or Workshop Item
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  18. 18
    Framework of Multi-Microcontroller Evaluation Tool for a use of Academic Environment

    Framework of Multi-Microcontroller Evaluation Tool for a use of Academic Environment by Selvakumar, Raja Saravana Kumar, Kamarul Hawari, Ghazali, Nik Mohd Kamil, Nik Yusof

    Published 2012
    “…These are presented in the second part of the paper describing the software part of the framework, which besides programming tools also discusses the code development tools. The stress is given to the use of assembly code and high-level tools, where the algorithms are described in the form of different graphical notations, i.e. block diagrams. …”
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  19. 19
    Enhancing obfuscation technique for protecting source code against software reverse engineering

    Enhancing obfuscation technique for protecting source code against software reverse engineering by Mahfoudh, Asma

    Published 2019
    “…Obfuscation techniques allow the programmer to customize which part of the code to be obfuscated. …”
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  20. 20
    Design and analysis of high performance matrix filling for DNA sequence alignment accelerator using asic design flow: article / Nurzaima Mahmod

    Design and analysis of high performance matrix filling for DNA sequence alignment accelerator using asic design flow: article / Nurzaima Mahmod by Mahmod, Nurzaima

    “…In the advanced engineering technology, the massive parallelism can be implemented by using the Field Programmable Logic Array (FPGA) techniques. The design was developed in Verilog HDL coding and synthesis by using LINUX tools. …”
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