Search Results - (( programme rate array ) OR ( programme based array ))

Design of field programmable gate array-based proportional-integral-derivative fuzzy logic controller with tunable ganin by Obaid, Zeyad Assi

“…Many of fuzzy control applications require real-time operation; higher density programmable logic devices such as Field Programmable Gate Array (FPGA) can be used to integrate large amounts of logic in a single IC. …”
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Design and implementation of real data fast fourier transform processor on field programmable gates array by Ahmed, Mohammed Kassim

“…In this work, the memorybased FFT processor, based on radix-4 FFT algorithm is implemented on Cyclone II Field Programmable Gates Array (FPGA). …”
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FPGA based Twofish Algorithm by Muhammad Imran, Ahmad, Mohd Nazrin, Md Isa, Abdul Halis, Abdul Aziz, Mohd Fisol, Osman

“…This paper presents the architecture of Twofish algorithm implemented with field programmable gate array (FPGA). Twofish is one of the five finalists in AES contest. …”
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Concurrent hardware architecture for dual-mode audio steganography processor-based FPGA by Shahadi H.I., Jidin R., Way W.H.

Digital beamforming implementation of switch-beam smart antenna system by using integrated digital signal processor and field-programmable gate array by Vakilian, Vida

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FPGA implementation of MCPFSK modulation for HF data communication by Fitri Dewi, Jaswar, Ahmad Zuri, Sha’ameri

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Flood Monitoring Warning System using FPGA / Ahmad Al-Zubir Zulkifly by Zulkifly, Ahmad Al-Zubir

“…The heart of the design is described using Verilog HDL (Hardware Description Language) and implemented in hardware using Field Programmable Gate Array (FPGA). This design is prototyped on Altera`s Cyclone DE2 FPGA board.…”
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An FPGA based embedded vision system for real-time motion detection by AlDahoul, Nouar, Htike@Muhammad Yusof, Zaw Zaw

“…This paper proposes an efficient FPGA (Field Programmable Gate Array) based real time video processing platform for monocular object detection. …”
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Design of SAR ADC control logic using verilog HDL by Ibrahim, Ahmad Arrazi

“…This control logic design methodology is based on Xilinx ISE 8.1 i Field Programmable Gate Array (FPGA) design flow from design entry until implementation process. …”
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DESIGN AND IMPLEMENTATION OF VLSI BASED HARDWARE ACCELERATORS FOR REAL TIME VIDEO IMAGE PROCESSING by YASRI, INDRA

“…The embedded video image processing with the integrated hardware accelerator edge detection co-processor was integrated with Altera Quartus System-On- a�Programmable-Chip (SOPC). The implementation result shows a field programmable gate arrays (FPGAs) acting as co-processor platforms for user defined co-processor, with real time performance at a frame rate of 30 fps with a resolution of 720 x 480. …”
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FPGA-Based Lightweight Hardware Architecture of the PHOTON Hash Function for IoT Edge Devices by Al-Shatari, M.O.A., Hussin, F.A., Aziz, A.A., Witjaksono, G., Tran, X.-T.

“…It is implemented and verified on several Xilinx and Altera Field Programmable Gate Array (FPGA) devices using their synthesis and simulation tools. …”
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Analysis of FPGA design methods using AN 8 BIT ALU by Mohd Zin, Rosnah

“…Field Programmable Logic Arrays (FPGAs) have been growing at a rapid rate in the past few years. …”
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Implementation On UTeMRISC Microcontroller With Embedded Fault-Tolerance by Mohd Hafiz, Sulaiman, Sani Irwan, Md Salim, Masrullizam, Mat Ibrahim

“…The UTeMRISC Microcontroller is chosen for this research and the fault-tolerance is designed based on the error correction code (ECC). The design is focused on the implementation of Hamming Code and Single-Error-Correction Double-Error-Detection (SEC-DED) Code that are synthesizable in the Field Programmable Gate Array (FPGA). …”
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Power Amplifiers Linearization Based On Complex Gain Memory Predistortion by Varahram, Pooria

“…This complex divider is then designed and implemented in Field Programmable Gate Array (FPGA) and combined with other parts to make the predistortion block. …”
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FPGA-enabled binarised convolutional neural networks toward real-time embedded object recognition system by Shuto, Daisuke, Abbas, Z., Sulaiman, N., Tamukoh, H.

“…In this presentation, we report the results of applying a binarised Convolutional Neural Network (CNN) and a Field Programmable Gate Array (FPGA) for image-based object recognition. …”
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A Simple Approach of Space-vector Pulse Width Modulation Realization Based on Field Programmable Gate Array by Sutikno, Tole, Jidin, Auzani, Wong, Jenn Hwa, Nik Idris, Nik Rumzi

“…Although there is much literature in the application of three-phase space-vector pulse width modulation based on field programmable gate arrays, most is on conventional space-vector pulse width modulation with designs that are complicated. …”
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Peak to average power ratio reduction based on optimum phase sequence in orthogonal frequency division multiplexing systems by Mohammady, Somayeh

“…In order to demonstrate the feasibility of these methods in actual systems, the prototype of DSI-SLM and OPS-DSI methods are carried out in Field Programmable Gate Array (FPGA). The implementation results are comparable with simulation results. …”
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Field programmable gate array based three-phase PWM inverter by Mekhilef, Saad, Rahim, N.A.

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Two-Step Implementation of Sigmoid Function for Artificial Neural Network in Field Programmable Gate Array by Syahrulanuar, Ngah, Rohani, Abu Bakar, Abdullah, Embong

“…In this paper, a combination of second order nonlinear function (SONF) and differential look-up table (differential LUT) is introduced as a sigmoid function for implementing the artificial neural network (ANN) in field programmable gate array (FPGA). Implementing ANN on FPGA will overcome the slow response for real-time application and portable issues that arise in the software-based ANN. …”
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Parallel-Pipelined-Memory (P2m) Of Blowfish Fpga-Based Radio System With Improved Power-Throughput For Secure Zigbee Transmission by Ahmad, Rafidah

“…In order to overcome this issue, this research work proposed an alternative cryptography scheme with improved power-throughput and reduced hardware utilization to be considered as a replacement to the existing AES. Based on the performance analysis among the symmetric cryptography schemes, the AES-128 and Blowfish schemes have been chosen to be enhanced and developed based on Zynq- 7000 field programmable gate array (FPGA) technology by using three design techniques comprised of parallel, pipelined and memory (P2M) techniques. …”
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