Search Results - (( programme gtp array ) OR ((( programme based array ) OR ( programming based array ))))

High-bandwidth, low-power CMOS transistor based cab for field programmable analog array by Al-Bawri, Samir Salem, Obadi, Ameen, Hossain, Kabir, Abdulhameed, Abdullah, Jusoh, Muzammil, Sabapathy, Thennarasan, El-Din Hussein, Alaa, Al Gburi, Ahmed Jamal Abdullah

“…This article presents an integrated current mode configurable analog block (CAB) system for field-programmable analog array (FPAA). The proposed architecture is based on the complementary metal-oxide semiconductor (CMOS) transistor level design where MOSFET transistors operating in the saturation region are adopted. …”
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Design and implementation of real data fast fourier transform processor on field programmable gates array by Ahmed, Mohammed Kassim

“…In this work, the memorybased FFT processor, based on radix-4 FFT algorithm is implemented on Cyclone II Field Programmable Gates Array (FPGA). …”
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Design of a reconfigurable computing platform by Papu J.J., See O.H.

“…This paper describes a design of a reconfigurable computing platform (RCP) based on the Intel Xeon general purpose processor and the Nallatech BenNUEY-PCI-4E field programmable gate array (FPGA) motherboard. …”

Digital beamforming implementation of switch-beam smart antenna system by using integrated digital signal processor and field-programmable gate array by Vakilian, Vida

“…After signal management the channels need to be split into sixteen antenna array elements by a means of FPGA board. To do so, the verilog code is written for programming the FPGA base on the signal which is come from DSP. …”
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FPGA based SPWM Bridge Inverter by Mohd Nazrin, Md Isa, Muhammad Imran, Ahmad, Sohiful Anuar, Zainol Murad, Mohd Khairuddin, Md Arshad

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Programming in C for foundation by Bakar, Noor Hasrina, Hassan, Noor Azimah, Idris, Mohd Norhaedir, Al-Shawabkeh, Mahmoud

“…This book on C programming language is a comprehensive tutorial and reference to C based on the ANSI C standard for beginners. …”
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Fast fourier transform processor implementation for high inputs on field programmable gates array by Ali Abbas, Zaid

“…Therefore, this research aims to investigate the power consumption, hardware resources usage and speed for radix-(2, 4 and 8) FFT processor, using the same device and environment to investigate the performance of each. Memory-based architecture chosen to use for FFT processors, due to the reduction in the number of butterflies and rotators, as they are reused for different stages of the FFT, were implemented on Cyclone II Field Programmable Gate Arrays (FPGA). …”
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Video Game Based on Microcontroller by Ahmad Syaifiq bin Razli, Ahmad Syaifiq

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FPGA based LCD for Flood Monitoring Warning System / Mohamad Afiq Azman by Azman, Mohamad Afiq

“…Flood Monitoring Warning System (FMWS) with FPGA (Field Programmable Gate Array) based is expected to be an inexpensive system which can provide information based on the water and water flow detecting system. …”
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IMAGE PROCESSING ALGORITHMS ON FPGA by MOHAMED SHUKOR, MOHAMED NASIR

“…The objective of this project is to construct a real time hardware image processing system which based on Field Programmable Gate Array (FPGA). The chosen image processing algorithms are implemented on two systems which are Color Filtering System and Edge Detection System. …”
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Design and implementation of FPGA-based systems - a review by Sulaiman, Nasri, Obaid, Zeyad Assi, Marhaban, Mohammad Hamiruce, Hamidon, Mohd Nizar

“…This paper reviews the state of the art of field programmable gate array (FPGA) with the focus on FPGA-based systems. …”
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PRINCE IP-core on Field Programmable Gate Arrays (FPGA) by Abbas Y.A., Jidin R., Jamil N., Z'aba M.R., Rusli M.E.

“…This study presents a high execution-speed and low-resource hardware IP-Core of PRINCE light weight block cipher on a Field Programmable Gate Arrays (FPGA). The new FPGA IP-core is to speed-up the performance of PRINCE, superseding software implementation that is typically slow and inefficient. …”

Crypto Embedded System for Electronic Document by Ahmad, Illiasaak, M.Thamrin, Norashikin, Hani, Mohamed Khalil

“…The RSA algorithm is implemented in a re-configurable hardware, in this case Field Programmable Gate Array (FPGA). The 32-bit soft cores of AlteraÂ’s Nios RISC processor is used as the basic building blocks of the proposed complete embedded solutions. …”
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Mobile application learning programme to learn fundamental of data structure using Gagne's learning style / Muhammad Syafiq Izzuddin Bahrin by Muhammad Syafiq Izzuddin Bahrin

“…Besides, most of the studies declared that a major drawback for beginner programmer is having weak skills on planning and outline This android-based mobile application is design for learners who want to learn about fundamental ofdata structure especially for Computer Science students. …”
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Conducted Electromagnetic Interference Spectral Peak Mitigation in Luo-Converter Using FPGA-Based Chaotic PWM Technique by Natarajan S., Padmavathi P., Kalvakurthi J.R., Sudhakar Babu T., Ramachandaramurthy V.K., Padmanaban S.

Xilinx FPGA based three-phase PWM inverter and its application for utility connected PV system by Mekhilef, Saad, Rahim, N.A.

“…Analysis and practical implementation of the regular (symmetric, asymmetric) sampled three-phase PWM inverter waveform has been presented in this paper, which was digitally implemented on an Xilinx field programmable gate array FPGA. and the essential considerations involved in the feasibility of using a Xilinx XC4008E software-based to generate PWM. …”
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Implementation of Real-time Simple Edge Detection on FPGA by Mohd Shukor, Mohd Nasir, Lo, H. H., Sebastian , Patrick

“…The objective of this paper was to develop a real time hardware image processing system which is based on Field Programmable Gate Array (FPGA). The chosen image processing algorithms implemented was edge detection. …”
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Implimenting Root Raised Cosine (RRC) filter for WCDMA / Nik Azman Nik Hassan by Nik Hassan, Nik Azman

“…The aim of this project is to implementing Root Raised Cosine (RRC) filter for WCDMA on Field Programmable Logic Array (FPGA) using VHDL programming language. …”
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Design tool in T&L: RC retaining wall / Mohamad Irwan P. Harahap and Felix Ling by P. Harahap, Mohamad Irwan, Ling, Felix

“…This innovation develops an Excel VBA-based program that could facilitate the analysis and design processes of a reinforced concrete (RC) retaining wall based on the con-current design standard namely Eurocode 2. …”
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Implementation of real-time simple edge detection on FPGA by P., Sebastian, M.N.B.M., Shukor, H.H., Lo

“…The objective of this paper was to develop a real time hardware image processing system which is based on Field Programmable Gate Array (FPGA). The chosen image processing algorithms implemented was edge detection. …”
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