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  1. 1

    An ensemble learning method for spam email detection system based on metaheuristic algorithms by Behjat, Amir Rajabi

    Published 2015
    “…In order to address the challenges that mentioned above in this study, in the first phase, a novel architecture based on ensemble feature selection techniques include Modified Binary Bat Algorithm (NBBA), Binary Quantum Particle Swarm Optimization (QBPSO) Algorithm and Binary Quantum Gravita tional Search Algorithm (QBGSA) is hybridized with the Multi-layer Perceptron (MLP) classifier in order to select relevant feature subsets and improve classification accuracy. …”
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    Thesis
  2. 2

    Real time motorcycle image detections on field programmable gate array by Mat Nong, Mohd Ali, Osman, Rosiah, Md Yusof, Juraina, Mohd Sidek, Roslina

    Published 2015
    “…This paper describes a process to generate a bounding box and analyzes the system performance in tracking the image and hardware utilize. …”
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    Conference or Workshop Item
  3. 3

    IMAGE PROCESSING ALGORITHMS ON FPGA by MOHAMED SHUKOR, MOHAMED NASIR

    Published 2007
    “…The objective of this project is to construct a real time hardware image processing system which based on Field Programmable Gate Array (FPGA). …”
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    Final Year Project
  4. 4

    Agent-based extraction algorithm for computational problem solving by Rajabi, Maryam

    Published 2015
    “…Therefore, utilizing the agent-based featured agents for this purpose is a benefit with the aim of helping novice programmers to understand the CPS without knowing the programming language. …”
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    Thesis
  5. 5

    MINIMIZATION OF RESOURCE UTILIZATION FOR A REAL-TIME DEPTH-MAP COMPUTATIONAL MODULE ON FPGA by NGO , NGO HUY TAN

    Published 2011
    “…The algorithm is computationally intensive and therefore more effective to be implemented on hardware such as the Field Programmable Gate Array (FPGA). …”
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    Thesis
  6. 6

    An FPGA based embedded vision system for real-time motion detection by AlDahoul, Nouar, Htike@Muhammad Yusof, Zaw Zaw

    Published 2015
    “…The proposed algorithm was implemented on the FPGA with a 25 MHz crystal. …”
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    Proceeding Paper
  7. 7

    Design and implementation of real data fast fourier transform processor on field programmable gates array by Ahmed, Mohammed Kassim

    Published 2015
    “…In this work, the memorybased FFT processor, based on radix-4 FFT algorithm is implemented on Cyclone II Field Programmable Gates Array (FPGA). …”
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    Thesis
  8. 8
  9. 9

    Implementation of Color Filtering on FPGA by Mohd Shukor, Mohd Nasir, Lo, H. H., Sebastian, Patrick

    Published 2007
    “…The chosen image processing algorithm is a single Color Filtering algorithm. This work utilizes Altera DE2 development board empowered by the Cyclone II FPGA paired with a 1.3 Mega pixel CMOS camera from Terasik Technologies. …”
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    Conference or Workshop Item
  10. 10
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    FPGA implementation of variable precision Euclid’s GCD algorithm by Al-Haija, Qasem Abu, Syed Ahmad Abdul Rahman, Sharifah Mumtazah, Alfarran, Islam

    Published 2017
    “…Additionally, it was found that the implementation with different precisions has utilized minimal resources of the target device, i.e., a maximum of 2% and 4% of device registers and look-up tables (LUT’s). …”
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    Article
  13. 13
  14. 14

    Optimum Material Removal in Electrical Discharge Machining through Advanced Control Integration of PSoC Microcontroller by Matthias Tiong Foh Thye, Leong Kah Meng, Mohd Azahar Che Abdullah, Jaysuman Pusppanathan, Abd Rahim Mat Sidek, Bentantya Nugroho

    Published 2025
    “…Electrical Discharge Machining (EDM) is an advanced non-traditional method for precision material removal using repeated electrical discharges. It utilizes a programmable tool electrode to intricately shape designs. …”
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    Article
  15. 15

    Low area Programmable Memory Built-In Self-Test (PMBIST) for small embedded ram cores / Nur Qamarina Mohd Noor by Mohd Noor, Nur Qamarina

    Published 2013
    “…To ensure high percentage of yield is achieved, a builtin self-test (BIST) is utilized to test these RAMs. …”
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    Thesis
  16. 16

    Design and implementation of multimedia digital matrix system by Chui, Yew Leong, Ramli, Abdul Rahman, Perumal, Thinagaran, Sulaiman, Mohd Yusof, Ali, Mohd Liakot

    Published 2005
    “…The algorithm, named as hybrid-reset algorithm utilizes the nature of asynchronous reset to compensate the drawback of synchronous counter for phase detection. …”
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    Conference or Workshop Item
  17. 17

    Design of a reconfigurable computing platform by Papu J.J., See O.H.

    Published 2023
    “…This paper describes a design of a reconfigurable computing platform (RCP) based on the Intel Xeon general purpose processor and the Nallatech BenNUEY-PCI-4E field programmable gate array (FPGA) motherboard. …”
    Conference paper
  18. 18

    Securing electrical substation's wireless messaging with a lightweight crypto-algorithm IP core by Abbas Y.A., Jidin R., Jami N., Z'aba M.R.

    Published 2023
    “…The crypto-algorithm has been implemented within an environment of microprocessor system on a XILINX Field Programmable Logic Arrays chip. …”
    Conference Paper
  19. 19

    Implementation of color filtering on FPGA by P., Sebastian, M.N.B.M., Shukor, H.H., Lo

    Published 2007
    “…The chosen image processing algorithm is a single Color Filtering algorithm. This work utilizes Altera DE2 development board empowered by the Cyclone II FPGA paired with a 1.3 Mega pixel CMOS camera from Terasik Technologies. …”
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    Conference or Workshop Item
  20. 20

    Implementation of Real-time Simple Edge Detection on FPGA by Mohd Shukor, Mohd Nasir, Lo, H. H., Sebastian , Patrick

    Published 2005
    “…The objective of this paper was to develop a real time hardware image processing system which is based on Field Programmable Gate Array (FPGA). …”
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    Conference or Workshop Item