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  1. 1
    Cyber Threat Extenuation for Substation Data Communication: Evaluation of Encrypt-Authenticator Prototype for IEC 60870-5 Data

    Cyber Threat Extenuation for Substation Data Communication: Evaluation of Encrypt-Authenticator Prototype for IEC 60870-5 Data by Jidin R., Jamil N., Abdul Rahim A.A.

    Published 2023
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  2. 2
    Implementation Of FPGA Based Encryption Chip Using VHD - Data Encryption Standard (DES) Algorithm

    Implementation Of FPGA Based Encryption Chip Using VHD - Data Encryption Standard (DES) Algorithm by Lim, Mui Liang

    Published 2006
    “…Cryptography has a long and fascinating history. Traditional Encryption Algorithms are implemented in software base because of the complexities involved in the operations. …”
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  3. 3
    Enhancing performance of XTS cryptography mode of operation using parallel design

    Enhancing performance of XTS cryptography mode of operation using parallel design by Ahmed Alomari, Mohammad

    Published 2009
    “…Performance evaluation shows that XTS exhibits faster speed when an RC6 encryption algorithm is used, compared to other encryption algorithms such as AES and Twofish. …”
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  4. 4
    Design of an advanced encryption standard crypto-processor core for field programmable gate array implementation

    Design of an advanced encryption standard crypto-processor core for field programmable gate array implementation by Ismail, Mohd. Izuan

    Published 2006
    “…The proposed AES Crypto-Processor accelerates the AES algorithm in reconfigurable Field Programmable Gate Arrays (FPGA). …”
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  5. 5
    Prototyping a lightweight encryption on a field programmable gate array for securing tele-control data

    Prototyping a lightweight encryption on a field programmable gate array for securing tele-control data by Jidin R., Tukijan S.N., Al-Bahadly I., Jamil N., Qassim Q.S.

    Published 2023
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  6. 6
    Design and Implementation of Advanced Encryption Standard Using Verilog HDL

    Design and Implementation of Advanced Encryption Standard Using Verilog HDL by Shamsiah, Suhaili, Rene Brooke, Fredrick, Zainah, Md. Zain, Norhuzaimin, Julai

    Published 2020
    “…The focus of this paper is to match with the existing cryptography algorithm, 128-bit Advanced Encryption Algorithm and improving the processing speed for the design with hardware implementation. …”
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  7. 7
    Design and implementation of advanced encryption standard using verilog HDL

    Design and implementation of advanced encryption standard using verilog HDL by Shamsiah, Suhaili, Fredrick, Rene Brooke, Zainah, Md. Zain, Norhuzaimin, Julai

    Published 2022
    “…The focus of this paper is to match with the existing cryptography algorithm, 128-bit Advanced Encryption Algorithm and improving the processing speed for the design with hardware implementation. …”
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  8. 8
    Study and Implementation of Data Mining in Urban Gardening

    Study and Implementation of Data Mining in Urban Gardening by Mohana, Muniandy, Lee, Eu Vern

    Published 2019
    “…The system is essentially a three-part development, utilising Android, Java Servlets, and Arduino platforms to create an optimised and automated urban-gardening system. …”
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  9. 9
    Reusable data-path architecture for encryption-then-authentication on FPGA

    Reusable data-path architecture for encryption-then-authentication on FPGA by Abbas Y.A., Jidin R., Jamil N., Zaba M.R.

    Published 2023
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  10. 10
    Implementation of PRINCE algorithm in FPGA

    Implementation of PRINCE algorithm in FPGA by Abbas Y.A., Jidin R., Jamil N., Z'aba M.R., Rusli M.E., Tariq B.

    Published 2023
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  11. 11
    FPGA based Twofish Algorithm

    FPGA based Twofish Algorithm by Muhammad Imran, Ahmad, Mohd Nazrin, Md Isa, Abdul Halis, Abdul Aziz, Mohd Fisol, Osman

    Published 2009
    “…This paper presents the architecture of Twofish algorithm implemented with field programmable gate array (FPGA). …”
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  12. 12
    Design of Cryptographic Hardware Module Using FPGA

    Design of Cryptographic Hardware Module Using FPGA by Muhammad Imran, Ahmad, Abdul Rahman, Mohd Saad, Mohd Nazrin, Md Isa, Mohd Taufik, Jusoh, Amir Razif Arief, Jamil Abdullah

    Published 2009
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  13. 13
    Cryptographic protection of block-oriented storage devices using AES-XTS in FPGA

    Cryptographic protection of block-oriented storage devices using AES-XTS in FPGA by Ahmed, Shakil

    Published 2013
    “…This standard uses AESXTS as a building block for the protection of data. For an effective storage encryption implementation, two well known methods are software based encryption and hardware based encryption. …”
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  14. 14
    The memory-less method of generating multiplicative inverse values for S-box in AES algorithm

    The memory-less method of generating multiplicative inverse values for S-box in AES algorithm by Siti Zarina, Md Naziri, Norina, Idris

    Published 2009
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  15. 15
    Implementation of High Speed Large Integer Multiplication Algorithm on Contemporary Architecture

    Implementation of High Speed Large Integer Multiplication Algorithm on Contemporary Architecture by Chang, Boon Chiao

    Published 2018
    “…The computation of cryptographic algorithm required a lot of large integer arithmetic computation, especially large integer exponentiation and modular operation. …”
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  16. 16
    Web-based expert system for material selection of natural fiber- reinforced polymer composites

    Web-based expert system for material selection of natural fiber- reinforced polymer composites by Ahmed Ali, Basheer Ahmed

    Published 2015
    “…Finally, the developed expert system was deployed over the internet with central interactive interface from the server as a web-based application. As Java is platform independent and easy to be deployed in web based application and accessible through the World Wide Web (www), this expert system can be one stop application for materials selection.…”
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  17. 17
    Towards Maximising Hardware Resources and Design Efficiency via High-Speed Implementation of HMAC based on SHA-256 Design

    Towards Maximising Hardware Resources and Design Efficiency via High-Speed Implementation of HMAC based on SHA-256 Design by Shamsiah, Suhaili, Norhuzaimin, Julai, Rohana, Sapawi, Nordiana, Rajaee

    Published 2024
    “…The MAC value is stored in the authentication data files of the Authentication Header and Encapsulating Security Payload. This article analyses a fast implementation of the Hash-based Message Authentication Code (HMAC), which uses its algorithm to ensure the validity and integrity of data to optimise hardware efficiency and design efficacy using the SHA-256 algorithm. …”
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  18. 18
    Towards Maximising Hardware Resources and Design Efficiency via High-Speed Implementation of HMAC based on SHA-256 Design

    Towards Maximising Hardware Resources and Design Efficiency via High-Speed Implementation of HMAC based on SHA-256 Design by Shamsiah, Suhaili, Norhuzaimin, Julai, Rohana, Sapawi, Nordiana, Rajaee

    Published 2024
    “…The MAC value is stored in the authentication data files of the Authentication Header and Encapsulating Security Payload. This article analyses a fast implementation of the Hash-based Message Authentication Code (HMAC), which uses its algorithm to ensure the validity and integrity of data to optimise hardware efficiency and design efficacy using the SHA-256 algorithm. …”
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  19. 19
    NoInjection: Preventing Unsafe Queries on NoSQL-Document-model Databases

    NoInjection: Preventing Unsafe Queries on NoSQL-Document-model Databases by Imam, A.A., Basri, S., Gonzalez-Aparicio, M.T., Balogun, A.O., Kumar, G.

    Published 2022
    “…This method utilizes the Asymmetric encryption algorithm, RSA in particular. Using this method, key pairs are generated and exchanged during the design. …”
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  20. 20
    NoInjection: Preventing Unsafe Queries on NoSQL-Document-model Databases

    NoInjection: Preventing Unsafe Queries on NoSQL-Document-model Databases by Imam, A.A., Basri, S., Gonzalez-Aparicio, M.T., Balogun, A.O., Kumar, G.

    Published 2022
    “…This method utilizes the Asymmetric encryption algorithm, RSA in particular. Using this method, key pairs are generated and exchanged during the design. …”
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