Search Results - (( programmable rate array ) OR ( programmable given array ))
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Implementation On UTeMRISC Microcontroller With Embedded Fault-Tolerance
Published 2016“…The design is focused on the implementation of Hamming Code and Single-Error-Correction Double-Error-Detection (SEC-DED) Code that are synthesizable in the Field Programmable Gate Array (FPGA). To evaluate the performance and functionality of the design, a number of pre-defined faults are injected into the Fault-Tolerant module at three different locations in the UTeMRISC Microcontroller architecture. …”
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Design of an advanced encryption standard crypto-processor core for field programmable gate array implementation
Published 2006“…The proposed AES Crypto-Processor accelerates the AES algorithm in reconfigurable Field Programmable Gate Arrays (FPGA). The processor design is completely described in hardware description language, VHDL. …”
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Design of field programmable gate array-based proportional-integral-derivative fuzzy logic controller with tunable ganin
Published 2010“…Many of fuzzy control applications require real-time operation; higher density programmable logic devices such as Field Programmable Gate Array (FPGA) can be used to integrate large amounts of logic in a single IC. …”
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Design Of Direct Sequence Code Division Multiple Access (Ds-Cdma) Wireless Transmitter Using Field Programmable Gate Array (Fpga)
Published 2002“…This thesis describes the DS-CDMA wireless transmitter design using FPGA (Field Programmable Gate Array), which has been adopted in many wireless access technologies. …”
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Implementation of a low complexity peak-to-average power ratio reduction scheme on field programmable gate array
Published 2015“…Here implementation of a proposed PTS on field programmable gate array platform to show the feasibility of the PAPR reduction scheme is carried out. …”
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FPGA based Twofish Algorithm
Published 2009“…This paper presents the architecture of Twofish algorithm implemented with field programmable gate array (FPGA). Twofish is one of the five finalists in AES contest. …”
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Working Paper -
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Design and implementation of real data fast fourier transform processor on field programmable gates array
Published 2015“…In this work, the memorybased FFT processor, based on radix-4 FFT algorithm is implemented on Cyclone II Field Programmable Gates Array (FPGA). In order to program the FPGA, Verilog Hardware Description Language (Verilog HDL) is used. …”
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Design method to transmit and receive source synchronous signals using source asynchronous
Published 2013“…Penyelesaian yang dicadangkan juga akan membolehkan jarak penghantaran saluran jam yang lebih panjang digunakan. Lower cost Field Programmable Gate Array (FPGA) devices offer limited data rate speed for source synchronous Low-Voltage Differential Signaling (LVDS) Input-Output (IO) interfaces but higher data rate speeds for source asynchronous transceivers channels. …”
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Concurrent hardware architecture for dual-mode audio steganography processor-based FPGA
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INVESTIGATING FACTORS THAT AFFECT THE CONTINUANCE USE INTENTION AMONG THE HIGHER EDUCATION INSTITUTIONS’ LEARNERS TOWARDS A GAMIFIED M-LEARNING APPLICATION
Published 2023“…Future Research Future studies could include respondents from other diploma programmes, resulting in an in-depth analysis. It is needed to support the generalizability of the findings in this study by considering larger populations from all different programmes. …”
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INVESTIGATING FACTORS THAT AFFECT THE CONTINUANCE USE INTENTION AMONG THE HIGHER EDUCATION INSTITUTIONS’ LEARNERS TOWARDS A GAMIFIED M-LEARNING APPLICATION
Published 2023“…Future Research Future studies could include respondents from other diploma programmes, resulting in an in-depth analysis. It is needed to support the generalizability of the findings in this study by considering larger populations from all different programmes. …”
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INVESTIGATING FACTORS THAT AFFECT THE CONTINUANCE USE INTENTION AMONG THE HIGHER EDUCATION INSTITUTIONS’ LEARNERS TOWARDS A GAMIFIED M-LEARNING APPLICATION
Published 2023“…Future Research Future studies could include respondents from other diploma programmes, resulting in an in-depth analysis. It is needed to support the generalizability of the findings in this study by considering larger populations from all different programmes. …”
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INVESTIGATING FACTORS THAT AFFECT THE CONTINUANCE USE INTENTION AMONG THE HIGHER EDUCATION INSTITUTIONS’ LEARNERS TOWARDS A GAMIFIED M-LEARNING APPLICATION
Published 2023“…Future Research Future studies could include respondents from other diploma programmes, resulting in an in-depth analysis. It is needed to support the generalizability of the findings in this study by considering larger populations from all different programmes. …”
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INVESTIGATING FACTORS THAT AFFECT THE CONTINUANCE USE INTENTION AMONG THE HIGHER EDUCATION INSTITUTIONS’ LEARNERS TOWARDS A GAMIFIED M-LEARNING APPLICATION
Published 2023“…Future Research Future studies could include respondents from other diploma programmes, resulting in an in-depth analysis. It is needed to support the generalizability of the findings in this study by considering larger populations from all different programmes. …”
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Partial discharge detection system for counting PD signals in high voltage underground cable by using FPGA technology
Published 2023“…Currently, FPGA (Field Programmable Gate Array) technology is being widely used for signal processing and control owing to its fast digital processing capability. …”
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Development And Implementation Of A New Technique For Bert (Bit Error Rate Tester) Using SDR Platform
Published 2011“…Hybrid digital signal processors (DSPs), field programmable gate arrays (FPGAs) and general-purpose processors (GPPs) designs are viable solution for software defined radio (SDR) technology. …”
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