Search Results - (( programmable (same OR some) array ) OR ( programmable rate array ))

Design of field programmable gate array-based proportional-integral-derivative fuzzy logic controller with tunable ganin by Obaid, Zeyad Assi

“…Many of fuzzy control applications require real-time operation; higher density programmable logic devices such as Field Programmable Gate Array (FPGA) can be used to integrate large amounts of logic in a single IC. …”
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Design and implementation of real data fast fourier transform processor on field programmable gates array by Ahmed, Mohammed Kassim

“…Therefore, and for accurate comparison, this study aims to investigate the most common algorithms of RFFT on the same device and resources used. In this work, the memorybased FFT processor, based on radix-4 FFT algorithm is implemented on Cyclone II Field Programmable Gates Array (FPGA). …”
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Hardware Implementation Of Modified A5/1 Stream Cipher by Siti Yohana Akmal Mohd Fauzi, Kamaruzzaman Seman, Marinah Othman, Farrah Masyitah Mohd Shuib

Concurrent hardware architecture for dual-mode audio steganography processor-based FPGA by Shahadi H.I., Jidin R., Way W.H.

FPGA implementation of log-polar mapping by Wong, W.K., Choo, C.W., Loo, C.K., Teh, J.P.

“…In this paper, we try to implement log-polar mapping techniques on Xilinx FPGA (Field Programmable Gate Array) board for unwarping the omnidirectional images into panoramic images to present a wide angle of view by preserving fine output image quality in a higher data compression manner. …”
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FPGA-enabled binarised convolutional neural networks toward real-time embedded object recognition system by Shuto, Daisuke, Abbas, Z., Sulaiman, N., Tamukoh, H.

“…In this presentation, we report the results of applying a binarised Convolutional Neural Network (CNN) and a Field Programmable Gate Array (FPGA) for image-based object recognition. …”
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New CFAR algorithm and circuit development for radar receiver by Kamal, Mustafa Subhi

“…The last MATLAB test for MSS-CA- vi CFAR with a spiky exponential model shown in Table 4.3 in chapter four shows clearly that MSS-CA-CFAR detects nine targets from ten that means the efficiency of detection of the proposed method is 90%. The field-programmable gate array FPGA chip that is used to implement the MSS-CA-CFAR algorithm needs only three signals from the radar receiver to match with the receiver circuit correctly which are time base clock signal period reset trigger signal and the pulse duration time.…”
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Implementation of a New Torque and Flux Controllers for Direct Torque Control (DTC) of Induction Machine Utilizing Digital Signal Processor (DSP) and Field Programmable Gate Arrays... by Toh, C. L., Idris, Nik Rumzi, Yatim, Abdul Halim, Muhammad, N. D., Elbuluk, M. E.

“…Implementation of these controllers using the combination of a digital signal processor (DSP) and a field programmable gate array (FPGA) device is presented. The simulation and experimental results showed that the controllers were capable of reducing the torque and flux ripples significantly. …”
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Design of fuzzy logic controller for AC motor based on field programmable gate array by Obaid, Zeyad Assi, Sulaiman, Nasri, Hamidon, Mohd Nizar

“…Fuzzy logic controller has been designed using VHDL language for implementation in field programmable gate array (FPGA). Two version of the controller have been designed, the first one is 6-bits which uses 6-bits for each input/output variables (6FBC), while the second uses 8-bits for each input/output variables (8FBC). …”
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FPGA Implementation of Emergency Door Car Entry System by Zaini Sulaiman

“…Emergency door car entry system can be implemented using Field Programmable Gate Array (FPGA) board. FPGA board is a board that can be programmed using source code to run the application that has been downloaded into it. …”
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Design of an advanced encryption standard crypto-processor core for field programmable gate array implementation by Ismail, Mohd. Izuan

“…The proposed AES Crypto-Processor accelerates the AES algorithm in reconfigurable Field Programmable Gate Arrays (FPGA). The processor design is completely described in hardware description language, VHDL. …”
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A very high speed FPGA-based Sudoku solver by AlDahoul, Nouar, Htike@Muhammad Yusof, Zaw Zaw, Zarzar, Mouayad

“…This paper proposes FPGA (Field Programmable Gate Array) based high speed Sudoku solver platform. …”
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Design Of Direct Sequence Code Division Multiple Access (Ds-Cdma) Wireless Transmitter Using Field Programmable Gate Array (Fpga) by Osman, Khalid Eltahir Mohamed

“…This thesis describes the DS-CDMA wireless transmitter design using FPGA (Field Programmable Gate Array), which has been adopted in many wireless access technologies. …”
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Implementation of a low complexity peak-to-average power ratio reduction scheme on field programmable gate array by Varahram, Pooria, Mohd Ali, Borhanuddin

“…Here implementation of a proposed PTS on field programmable gate array platform to show the feasibility of the PAPR reduction scheme is carried out. …”
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Field Programmable Gate Array (FPGA)-based Intelligent Management System for Home Appliances by Maimun, Huja Husin, C. H., Kaan, Mohamad Faizrizwan, Mohd Sabri, Nurdiani, Zamhari, Asrani, Lit

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FPGA based Twofish Algorithm by Muhammad Imran, Ahmad, Mohd Nazrin, Md Isa, Abdul Halis, Abdul Aziz, Mohd Fisol, Osman

“…This paper presents the architecture of Twofish algorithm implemented with field programmable gate array (FPGA). Twofish is one of the five finalists in AES contest. …”
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Multi-directional matrix converter for low power application using field-programmable gate array by Toosi, Saman

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Sigma-delta analog to digital converter on field programmable gate array by Hamadani, Maral Faghani

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Dual-sampling sigma-delta analog-to-digital converter implementation in field-programmable gate array by Noor Shah, Mohd Syahril

“…With the latest advancement in field-programmable gate array (FPGA) technology,the analog-to-digital converter (ADC) can now be integrated within the FPGA digital fabric without the need for an external ADC chip. …”
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Design method to transmit and receive source synchronous signals using source asynchronous by Ramachandran, Nathan

“…Penyelesaian yang dicadangkan juga akan membolehkan jarak penghantaran saluran jam yang lebih panjang digunakan. Lower cost Field Programmable Gate Array (FPGA) devices offer limited data rate speed for source synchronous Low-Voltage Differential Signaling (LVDS) Input-Output (IO) interfaces but higher data rate speeds for source asynchronous transceivers channels. …”
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