Search Results - (( program implementation max algorithm ) OR ( parallel optimization path algorithm ))

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  1. 1
    Tool path generation of contour parallel based on ant colony optimisation

    Tool path generation of contour parallel based on ant colony optimisation by Abdullah, Haslina, Ramli, Rizauddin, Abd Wahab, Dzuraidah, Abu Qudeiri, Jaber

    Published 2016
    “…An Ant Colony Optimisation (ACO) method is used to optimize the tool path length because of its capability to find the shortest tool path length. …”
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  2. 2
    Minimizing machining airtime motion with an ant colony algorithm

    Minimizing machining airtime motion with an ant colony algorithm by Abdullah, Haslina, Ramli, Rizauddin, Abd Wahab, Dzuraidah, Abu Qudeiri, Jaber

    Published 2016
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  3. 3
    A multidimensional data descriptor tool based on fuzzy min max neural network algorithm

    A multidimensional data descriptor tool based on fuzzy min max neural network algorithm by Fatin Nurjannah, Salauddin

    Published 2018
    “…They have been compare for their advantages and disadvantages. The implementation of Fuzzy Min Max Neural Network technique has been applied using Matlab Programming. …”
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  4. 4
    An event-driven simulation for highest urgency first (HUF) : a latency and modulation aware bandwidth allocation algorithm for WiMAX base stations.

    An event-driven simulation for highest urgency first (HUF) : a latency and modulation aware bandwidth allocation algorithm for WiMAX base stations. by Naghshbandi, Danial, Subramaniam, Shamala, Moghadam, Saeed Rahimi

    Published 2013
    “…This research has focused at developing a discrete-event simulator to implement bandwidth allocation algorithms for a WiMAX base station.The highest urgency first algorithm has been utilized as a benchmark deployment algorithm in order to provide: dynamic downlink/uplink adjustment and latency guarantee for real-time applications. …”
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  5. 5
    OPTIMAL DATAPATH DESIGN FOR A CRYPTOGRAPHIC PROCESSOR: THE BLOWFISH ALGORITHM

    OPTIMAL DATAPATH DESIGN FOR A CRYPTOGRAPHIC PROCESSOR: THE BLOWFISH ALGORITHM by Zain Ali, Noohul Basheer, Noras, James

    Published 2001
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  6. 6
    Maximum 2-satisfiability in radial basis function neural network

    Maximum 2-satisfiability in radial basis function neural network by Shehab Abdulhabib Alzaeemi, Saratha Sathasivam, Mohd Shareduwan Mohd Kasihmuddin, Mohd. Asyraf Mansor

    Published 2020
    “…The simulated results suggest that the proposed algorithm is effective in doing MAX2SAT logic programming by analysing the performance by obtaining lower Root Mean Square Error, high ratio of satisfied clauses and lesser CPU time.…”
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  7. 7
    Digital beamforming implementation of switch-beam smart antenna system by using integrated digital signal processor and field-programmable gate array

    Digital beamforming implementation of switch-beam smart antenna system by using integrated digital signal processor and field-programmable gate array by Vakilian, Vida

    Published 2008
    “…After modeling, the algorithm is implemented in DSP. By using the Hardware- In-Loop facility of DSP, the comparison between hardware implementation and software modeling is performed. …”
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  8. 8
    Restoration planning strategy of transmission system based on optimal energizing time of sectionalizing islands / Dian Najihah Abu Talib

    Restoration planning strategy of transmission system based on optimal energizing time of sectionalizing islands / Dian Najihah Abu Talib by Dian Najihah , Abu Talib

    Published 2019
    “…There are two discrete optimization techniques used in this work, which are the Artificial Bee Colony algorithm and Evolutionary Programming. …”
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  9. 9
    Designing and Developing an Intelligent Congkak

    Designing and Developing an Intelligent Congkak by Muhammad Safwan, Mohd Shahidan

    Published 2011
    “…and “Can Min-Max algorithm (MM) be speeded up by using NN as a forward-pruning method?”. …”
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  10. 10
    A novel large-bit-size architecture and microarchitecture for the implementation of Superscalar Pipeline VLIW microprocessors

    A novel large-bit-size architecture and microarchitecture for the implementation of Superscalar Pipeline VLIW microprocessors by Lee, Weng Fook

    Published 2008
    “…Different adder architectures are investigated for suitability on synthesis implementation of large data bus size adder for efficient usage within the ALU. An adder algorithm using repetitive constructs in a parallel algorithm that allows for efficient and optimal synthesis for large data bus size is proposed as a suitable implementation for the adder within the ALU. …”
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  11. 11
    CPLD based controller for single phase inverters

    CPLD based controller for single phase inverters by Saiman, Suhaimi

    Published 2007
    “…A type of filter is used to improve the distortion in the output waveform. A design and implementation of PWM by using complex programmable logic device (CPLD) from Altera MaxPlus II is constructed and programmed. …”
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  12. 12
    CPLD based controller for single phase inverters

    CPLD based controller for single phase inverters by Saiman, Suhaimi

    Published 2007
    “…A type of filter is used to improve the distortion in the output waveform. A design and implementation of PWM by using complex programmable logic device (CPLD) from Altera MaxPlus II is constructed and programmed. …”
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  13. 13
    A 'snowflake' geometrical representation for optimised degree six 3-modified chordal ring networks

    A 'snowflake' geometrical representation for optimised degree six 3-modified chordal ring networks by Chien, Stephen Lim Een, Raja Maamor Shah, Raja Noor Farah Azura, Othman, Mohamed

    Published 2016
    “…A tree visualisation was constructed based on its connectivity to enable the generation of formulae for optimal diameter and average optimal path lengths. …”
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  14. 14
    Detection of black hole nodes in mobile ad hoc network using hybrid trustworthiness and energy consumption techniques

    Detection of black hole nodes in mobile ad hoc network using hybrid trustworthiness and energy consumption techniques by Mustafa, Ahmed Sudad

    Published 2017
    “…In this thesis, a hybrid detection algorithm mechanism has been proposed which combines two detection algorithms based on nodes’ trustworthiness and energy consumption in a parallel manner in order to detect the black hole nodes. …”
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  15. 15
    Fast fourier transform processor implementation for high inputs on field programmable gates array

    Fast fourier transform processor implementation for high inputs on field programmable gates array by Ali Abbas, Zaid

    Published 2018
    “…Verilog Hardware Description Language (Verilog HDL) and VHDL Languages are used to program the algorithms into the FPGA. FFT algorithms will be implemented for up to 4096 points to measure the high load processing capability. …”
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  16. 16
    FPGA Implementation of Emergency Door Car Entry System

    FPGA Implementation of Emergency Door Car Entry System by Zaini Sulaiman

    Published 2008
    “…Emergency door car entry system can be implemented using Field Programmable Gate Array (FPGA) board. …”
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    Learning Object
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  17. 17
    SG-PBFS : Shortest Gap-Priority Based Fair Scheduling technique for job scheduling in cloud environment

    SG-PBFS : Shortest Gap-Priority Based Fair Scheduling technique for job scheduling in cloud environment by Murad, Saydul Akbar, Zafril Rizal, M. Azmi, Muzahid, Abu Jafar Md, Bhuiyan, Md Khairul Bashar, Saib, Md, Rahimi, Nick, Prottasha, Nusrat Jahan, Bairagi, Anupam Kumar

    Published 2024
    “…To conduct this experiment, we employed the CloudSim simulator, which is implemented using the Java programming language.…”
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  18. 18
    Online teleoperation of writing manipulator through graphics processing unit based accelerated stereo vision

    Online teleoperation of writing manipulator through graphics processing unit based accelerated stereo vision by Abu Raid, Fadi Imad Osman

    Published 2021
    “…These algorithms are then parallelized using Compute Unified Device Architecture CUDA C language to run on Graphics Processing Unit GPU for hardware acceleration. …”
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  19. 19
    DC-based PV-powered home energy system

    DC-based PV-powered home energy system by Sabry, Ahmad H.

    Published 2017
    “…A controller based on an algorithm of one time maximum power point (MPP) is proposed to mitigate those losses. …”
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  20. 20
    Digital Signal Processor (DSP) Design Using Very Long Instruction Word (VLIW) Architecture

    Digital Signal Processor (DSP) Design Using Very Long Instruction Word (VLIW) Architecture by Lee, Lini @ Lini Lee

    Published 2001
    “…However, the pDSP chip has better ability to perform number crunching algorithms simultaneously. The objective of this research is to design and implement a general-purpose programmable DSP (Digital Signal Processor) core. …”
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