Search Results - (( program based max algorithm ) OR ( java application reoptimize algorithm ))

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  1. 1

    An event-driven simulation for highest urgency first (HUF) : a latency and modulation aware bandwidth allocation algorithm for WiMAX base stations. by Naghshbandi, Danial, Subramaniam, Shamala, Moghadam, Saeed Rahimi

    Published 2013
    “…This research has focused at developing a discrete-event simulator to implement bandwidth allocation algorithms for a WiMAX base station.The highest urgency first algorithm has been utilized as a benchmark deployment algorithm in order to provide: dynamic downlink/uplink adjustment and latency guarantee for real-time applications. …”
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    Article
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    Digital beamforming implementation of switch-beam smart antenna system by using integrated digital signal processor and field-programmable gate array by Vakilian, Vida

    Published 2008
    “…To do so, the verilog code is written for programming the FPGA base on the signal which is come from DSP. …”
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    Thesis
  4. 4

    Designing and Developing an Intelligent Congkak by Muhammad Safwan, Mohd Shahidan

    Published 2011
    “…This issues can solved by programming the Congkak system based on previous work on Mancala and NN system, and then recording the performance of the related algorithm. …”
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    Thesis
  5. 5

    Building customer churn prediction models in Indonesian telecommunication company using decision tree algorithm by Ramadhanti,, Darin, Larasati, Aisyah, Muid, Abdul, Mohamad, Effendi

    Published 2023
    “…The type of contract has the highest impact on the customer churn in this company. Based on the results, the company is suggested to promote a retention program based in order to decrease customer churn rate.…”
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    Conference or Workshop Item
  6. 6

    Fair energy-efficient resource allocation for downlink NOMA heterogeneous networks by Ali, Zuhura Juma, Noordin, Nor Kamariah, Sali, Aduwati, Hashim, Fazirulhisyam

    Published 2020
    “…The mathematical formulation of the max-min energy efficiency is a non-convex fractional programming problem and is intractable. …”
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    Fast fourier transform processor implementation for high inputs on field programmable gates array by Ali Abbas, Zaid

    Published 2018
    “…Verilog Hardware Description Language (Verilog HDL) and VHDL Languages are used to program the algorithms into the FPGA. FFT algorithms will be implemented for up to 4096 points to measure the high load processing capability. …”
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    Thesis
  11. 11

    Digital Signal Processor (DSP) Design Using Very Long Instruction Word (VLIW) Architecture by Lee, Lini @ Lini Lee

    Published 2001
    “…Thus, the time for redesign is significandy shorten. Based on the verification done on Programmable Logic Device (PLO) of MAX 7000s family, the operation can be executed in 40 MIPS (Million instructions per second). …”
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    Thesis