Search Results - (( parallel visualization learning algorithm ) OR ( sequence optimization max algorithm ))
Search alternatives:
- visualization learning »
- learning algorithm »
- optimization max »
- max algorithm »
-
1
Training size optimization with reduced complexity in cell-free massive MIMO system
Published 2019“…In this paper, we proposed to use training size optimization in cell-free massive MIMO system. In addition, we proposed and compared the performance of different training size optimization algorithms, namely exhaustive search optimization, bisection optimization and min–max optimization, with each method has different level of calculation complexities. …”
Get full text
Get full text
Article -
2
Mathematical simulation for 3-dimensional temperature visualization on open source-based grid computing platform
Published 2009Get full text
Get full text
Get full text
Conference or Workshop Item -
3
Grid portal technology for web based education of parallel computing courses, applications and researches
Published 2009“…These courses will actively engage the students in exploring the concepts of the development the parallel algorithm in visualizing the grand challenge applications of mathematical problems. …”
Get full text
Get full text
Conference or Workshop Item -
4
Efficient Malware Detection And Response Model Using Enhanced Parallel Deep Learning (EPDL-MDR)
Published 2026“…Attackers use code obfuscation to conceal malicious code, making it difficult for conventional systems and machine learning classifiers to detect threats. Developing a visual dataset with parallel deep learning (PDL) techniques may help overcome these challenges. …”
thesis::doctoral thesis -
5
Fair energy-efficient resource allocation for downlink NOMA heterogeneous networks
Published 2020“…Simultaneously, the max-min energy efficiency optimization approach is employed to maximize the minimum energy efficiency of the femtocell users to achieve the optimal power allocation solution. …”
Get full text
Get full text
Get full text
Article -
6
Dynamic transmit antenna shuffling scheme for hybrid multiple-input multiple-output in layered architecture
Published 2010“…Two dynamic transmit antenna shuffling schemes, namely ‘Optimal’ and ‘Max STBC’, are proposed to enhance the V-BLAST/STBC transceiver scheme with LC-QR proposed in the first part. …”
Get full text
Get full text
Thesis -
7
Acquisition of context-based word recognition by reinforcement learning using a recurrent neural network
Published 2012“…The developed learning system has a 4-layered RNN and it was trained by BPTT method based on teaching signal that was generated by Q-Learning algorithm. …”
Get full text
Get full text
Thesis -
8
Acquisition of context-based word recognition by reinforcement learning using a recurrent neural network
Published 2012“…The developed learning system has a 4-layered RNN and it was trained by BPTT method based on teaching signal that was generated by Q-Learning algorithm. …”
Get full text
Get full text
Thesis -
9
Acquisition of context-based word recognition by reinforcement learning using a recurrent neural network
Published 2012“…The developed learning system has a 4-layered RNN and it was trained by BPTT method based on teaching signal that was generated by Q-Learning algorithm. …”
Get full text
Get full text
Undergraduates Project Papers -
10
A novel neuroscience-inspired architecture: for computer vision applications
Published 2016“…The theory behind deep learning, the human visual system was investigated and general principles of how it functions are extracted. …”
Get full text
Get full text
Get full text
Get full text
Proceeding Paper -
11
-
12
Investigating computational thinking among primary school students in Terengganu using visual programming
Published 2022“…Recent studies have shown that visual programming is one of the efficient tools to develop CT skills. …”
Get full text
Get full text
Thesis -
13
Digital Signal Processor (DSP) Design Using Very Long Instruction Word (VLIW) Architecture
Published 2001“…Using, VHDL (Very-High-Speed-Integrated-Circuit Hardware Description Language) as design tool has the advantage in optimizing the pDSP hardware requirement with ease where varying the size of units such as register files (RF), program sequencer (PS), data address generator (DAG), arithmetic logic unit (ALU), multiply-accumulator (MAC) and shifter can be done by changing the data width or bit values. …”
Get full text
Get full text
Thesis
