Search Results - (( parallel invention method algorithm ) OR ( using codification using algorithm ))

  • Showing 1 - 5 results of 5
Refine Results
  1. 1
  2. 2

    The Determination of Pile Capacity Using Artificial Neural-net: An Optimization Approach by Ab. Malik, Rosely, Jamil S., Mohamed

    Published 2001
    “…Using the developed algorithm, the safety measures involved are such as reliability index and the probability of failure; instead of only factor of safety if conventional deterministic approach is used. …”
    Get full text
    Get full text
    Article
  3. 3

    A novel large-bit-size architecture and microarchitecture for the implementation of Superscalar Pipeline VLIW microprocessors by Lee, Weng Fook

    Published 2008
    “…Different adder architectures are investigated for suitability on synthesis implementation of large data bus size adder for efficient usage within the ALU. An adder algorithm using repetitive constructs in a parallel algorithm that allows for efficient and optimal synthesis for large data bus size is proposed as a suitable implementation for the adder within the ALU. …”
    Get full text
    Thesis
  4. 4

    Online teleoperation of writing manipulator through graphics processing unit based accelerated stereo vision by Abu Raid, Fadi Imad Osman

    Published 2021
    “…These algorithms are then parallelized using Compute Unified Device Architecture CUDA C language to run on Graphics Processing Unit GPU for hardware acceleration. …”
    Get full text
    Get full text
    Thesis
  5. 5

    Discriminative feature representation for Malay children’s speech recognition / Seyedmostafa Mirhassani by Mirhassani, Seyedmostafa

    Published 2015
    “…In case of multiple filterbanks the cepstral features are used in different experts for performing classification based on different representation of speeches. …”
    Get full text
    Get full text
    Thesis