Search Results - (( parallel distribution channel algorithm ) OR ( parallel optimization path algorithm ))
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DC-based PV-powered home energy system
Published 2017“…A controller based on an algorithm of one time maximum power point (MPP) is proposed to mitigate those losses. …”
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Tool path generation of contour parallel based on ant colony optimisation
Published 2016“…An Ant Colony Optimisation (ACO) method is used to optimize the tool path length because of its capability to find the shortest tool path length. …”
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Minimizing machining airtime motion with an ant colony algorithm
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WCDMA teletraffic performance improvement via power resource optimization using distributed parallel genetic algorithm
Published 2023“…The embedded GA optimization scheme was based on minimum downlink power consumption tailored for a WCDMA network that employs adaptive antennas in support of a heterogeneous user mix. The algorithm works by finding the minimum transmitter power with the help of Distributed Parallel Genetic Algorithm (DPGA) employed on an offload microcontroller system to form optimal beam coverage to reduce power usage of adaptive antenna at WCDMA base station. …”
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Extended Kalman Filter (EKF)-based modular-stack Vanadium Redox Flow Battery (V-RFB) prediction model development for reducing electrode contact resistance and parallelization curr...
Published 2019“…Extended reduction of power losses by 53% were recorded as parallel flow channels has been applied to the V-RFB. …”
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Restoration planning strategy of transmission system based on optimal energizing time of sectionalizing islands / Dian Najihah Abu Talib
Published 2019“…There are two discrete optimization techniques used in this work, which are the Artificial Bee Colony algorithm and Evolutionary Programming. …”
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Investigation of QAM based on mean square error (MSE) channel estimation (CE) for MIMO-OFDM pilot based system / Mohd Ariff Ibrahim
Published 2013“…There is Channel Estimation (CE) which consists of different statement to obtain high gain and a better performance of Bit Error Rate (BER). …”
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A novel large-bit-size architecture and microarchitecture for the implementation of Superscalar Pipeline VLIW microprocessors
Published 2008“…Different adder architectures are investigated for suitability on synthesis implementation of large data bus size adder for efficient usage within the ALU. An adder algorithm using repetitive constructs in a parallel algorithm that allows for efficient and optimal synthesis for large data bus size is proposed as a suitable implementation for the adder within the ALU. …”
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A 'snowflake' geometrical representation for optimised degree six 3-modified chordal ring networks
Published 2016“…A tree visualisation was constructed based on its connectivity to enable the generation of formulae for optimal diameter and average optimal path lengths. …”
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Detection of black hole nodes in mobile ad hoc network using hybrid trustworthiness and energy consumption techniques
Published 2017“…In this thesis, a hybrid detection algorithm mechanism has been proposed which combines two detection algorithms based on nodes’ trustworthiness and energy consumption in a parallel manner in order to detect the black hole nodes. …”
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Online teleoperation of writing manipulator through graphics processing unit based accelerated stereo vision
Published 2021“…These algorithms are then parallelized using Compute Unified Device Architecture CUDA C language to run on Graphics Processing Unit GPU for hardware acceleration. …”
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