Search Results - (( parallel application tree algorithm ) OR ( java application reoptimize algorithm ))
Search alternatives:
- application reoptimize »
- parallel application »
- application tree »
- java application »
- tree algorithm »
-
1
Speeding up index construction with GPU for DNA data sequences
Published 2011“…The advancement of technology in scientific community has produced terabytes of biological data.This datum includes DNA sequences.String matching algorithm which is traditionally used to match DNA sequences now takes much longer time to execute because of the large size of DNA data and also the small number of alphabets.To overcome this problem, the indexing methods such as suffix arrays or suffix trees have been introduced.In this study we used suffix arrays as indexing algorithm because it is more applicable, not complex and used less space compared to suffix trees.The parallel method is then introduced to speed up the index construction process. …”
Get full text
Get full text
Get full text
Conference or Workshop Item -
2
Image classification using two dimensional wavelet coefficients with parallel computing
Published 2020Get full text
Get full text
Final Year Project / Dissertation / Thesis -
3
Multi-criteria divisible load scheduling in binary tree network
Published 2016Get full text
Get full text
Thesis -
4
Energy-aware task scheduling for streaming applications on NoC-based MPSoCs
Published 2024“…Our approach is supported by a set of novel techniques, which include constructing an initial schedule based on a list scheduling where the priority of each task is its approximate successor-tree-consistent deadline such that the workload across all the processors is balanced, a retiming heuristic to transform intraperiod dependencies into inter-period dependencies for enhancing parallelism, assigning an optimal discrete frequency for each task and each message using a Non-Linear Programming (NLP)-based algorithm and an Integer-Linear Programming (ILP)-based algorithm, and an incremental approach to reduce the memory usage of the retimed schedule in case of memory size violations. …”
Get full text
Get full text
Get full text
Article -
5
Algorithm optimization and low cost bit-serial architecture design for integer-pixel and sub-pixel motion estimation in H.264/AVC / Mohammad Reza Hosseiny Fatemi
Published 2012“…The second design uses a 2-D bit-serial adder tree connected to a reconfigurable reference buffer making it suitable for hardware parallelism. …”
Get full text
Get full text
Get full text
Get full text
Get full text
Thesis -
6
A 'snowflake' geometrical representation for optimised degree six 3-modified chordal ring networks
Published 2016Get full text
Get full text
Conference or Workshop Item
