Search Results - (( java selection path algorithm ) OR ( program application max algorithm ))

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  1. 1
    An event-driven simulation for highest urgency first (HUF) : a latency and modulation aware bandwidth allocation algorithm for WiMAX base stations.

    An event-driven simulation for highest urgency first (HUF) : a latency and modulation aware bandwidth allocation algorithm for WiMAX base stations. by Naghshbandi, Danial, Subramaniam, Shamala, Moghadam, Saeed Rahimi

    Published 2013
    “…This research has focused at developing a discrete-event simulator to implement bandwidth allocation algorithms for a WiMAX base station.The highest urgency first algorithm has been utilized as a benchmark deployment algorithm in order to provide: dynamic downlink/uplink adjustment and latency guarantee for real-time applications. …”
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  2. 2
    Maximum 2-satisfiability in radial basis function neural network

    Maximum 2-satisfiability in radial basis function neural network by Shehab Abdulhabib Alzaeemi, Saratha Sathasivam, Mohd Shareduwan Mohd Kasihmuddin, Mohd. Asyraf Mansor

    Published 2020
    “…The simulated results suggest that the proposed algorithm is effective in doing MAX2SAT logic programming by analysing the performance by obtaining lower Root Mean Square Error, high ratio of satisfied clauses and lesser CPU time.…”
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  3. 3
    Visdom: Smart guide robot for visually impaired people

    Visdom: Smart guide robot for visually impaired people by Lee, Zhen Ting

    Published 2025
    “…Key features include the SMAC Hybrid A* algorithm for global path planning, the Regulated Pure Pursuit Controller for local trajectory execution and dynamic obstacle avoidance, and gmapping for SLAM functionality. …”
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  4. 4
    Digital beamforming implementation of switch-beam smart antenna system by using integrated digital signal processor and field-programmable gate array

    Digital beamforming implementation of switch-beam smart antenna system by using integrated digital signal processor and field-programmable gate array by Vakilian, Vida

    Published 2008
    “…The application targeted for this research is WiMax. Regardless of the application, hardware implementation of smart antenna is very challenging and complicated. …”
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  5. 5
    Fair energy-efficient resource allocation for downlink NOMA heterogeneous networks

    Fair energy-efficient resource allocation for downlink NOMA heterogeneous networks by Ali, Zuhura Juma, Noordin, Nor Kamariah, Sali, Aduwati, Hashim, Fazirulhisyam

    Published 2020
    “…The mathematical formulation of the max-min energy efficiency is a non-convex fractional programming problem and is intractable. …”
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  6. 6
    Evolutionary cost-cognizant regression test case prioritization for object-oriented programs

    Evolutionary cost-cognizant regression test case prioritization for object-oriented programs by Bello, AbdulKarim

    Published 2019
    “…Therefore, this study proposed a cost-cognizant TCP approach for object-oriented software that uses path-based integration testing to identify the possible execution path extracted from the Java System Dependence Graph (JSDG) model of the source code using forward slicing technique. …”
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  7. 7
    Fast fourier transform processor implementation for high inputs on field programmable gates array

    Fast fourier transform processor implementation for high inputs on field programmable gates array by Ali Abbas, Zaid

    Published 2018
    “…Verilog Hardware Description Language (Verilog HDL) and VHDL Languages are used to program the algorithms into the FPGA. FFT algorithms will be implemented for up to 4096 points to measure the high load processing capability. …”
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  8. 8
    FPGA Implementation of Emergency Door Car Entry System

    FPGA Implementation of Emergency Door Car Entry System by Zaini Sulaiman

    Published 2008
    “…FPGA board is a board that can be programmed using source code to run the application that has been downloaded into it. …”
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  9. 9
    Digital Signal Processor (DSP) Design Using Very Long Instruction Word (VLIW) Architecture

    Digital Signal Processor (DSP) Design Using Very Long Instruction Word (VLIW) Architecture by Lee, Lini @ Lini Lee

    Published 2001
    “…Based on the verification done on Programmable Logic Device (PLO) of MAX 7000s family, the operation can be executed in 40 MIPS (Million instructions per second). …”
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