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  1. 1
    Image clustering comparison of two color segmentation techniques

    Image clustering comparison of two color segmentation techniques by Subramaniam, Kavitha Pichaiyan

    Published 2010
    “…Finally, the algorithm found, which would solve the image segmentation problem.…”
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  2. 2
    Automatic Number Plate Recognition on android platform: With some Java code excerpts

    Automatic Number Plate Recognition on android platform: With some Java code excerpts by ., Abdul Mutholib, Gunawan, Teddy Surya, Kartiwi, Mira

    Published 2016
    “…On the other hand, the traditional algorithm using template matching only obtained 83.65% recognition rate with 0.97 second processing time. …”
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  3. 3
    Development of seven segment display recognition using TensorFlow on Raspberry Pi

    Development of seven segment display recognition using TensorFlow on Raspberry Pi by Gunawan, Teddy Surya, Mohammad Reduwan, Haque, Yaacob, Mashkuri, Mohamed Azmin, Nor Fadhillah, Ismail, Nanang, Ismail, Md Yusof, Kartiwi, Mira, A. Rahman, Azhar

    Published 2022
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  4. 4
    Studies on flat CORDIC implementation in field programmable gate arrays (FPGA) / Meera Subramaniam

    Studies on flat CORDIC implementation in field programmable gate arrays (FPGA) / Meera Subramaniam by Meera , Subramaniam

    Published 2004
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  5. 5
    Design of Cryptographic Hardware Module Using FPGA

    Design of Cryptographic Hardware Module Using FPGA by Muhammad Imran, Ahmad, Abdul Rahman, Mohd Saad, Mohd Nazrin, Md Isa, Mohd Taufik, Jusoh, Amir Razif Arief, Jamil Abdullah

    Published 2009
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  6. 6
    Real time motorcycle image detections on field programmable gate array

    Real time motorcycle image detections on field programmable gate array by Mat Nong, Mohd Ali, Osman, Rosiah, Md Yusof, Juraina, Mohd Sidek, Roslina

    Published 2015
    “…This paper also discussed on image processing algorithm used and embedded techniques involved. …”
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  7. 7
    Design of a reconfigurable computing platform

    Design of a reconfigurable computing platform by Papu J.J., See O.H.

    Published 2023
    “…The PSP also automates the synthesis and implementation process integration to generate the bitstream file from the Xilinx ISE foundation tool. …”
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  8. 8
    Optimum Material Removal in Electrical Discharge Machining through Advanced Control Integration of PSoC Microcontroller

    Optimum Material Removal in Electrical Discharge Machining through Advanced Control Integration of PSoC Microcontroller by Matthias Tiong Foh Thye, Leong Kah Meng, Mohd Azahar Che Abdullah, Jaysuman Pusppanathan, Abd Rahim Mat Sidek, Bentantya Nugroho

    Published 2025
    “…Additionally, the timer algorithm was closely associated with the machining process timing. …”
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  9. 9
    Agent-based extraction algorithm for computational problem solving

    Agent-based extraction algorithm for computational problem solving by Rajabi, Maryam

    Published 2015
    “…Moreover, the extraction algorithm is located in User_Agent to perform extraction of appropriate information needed from the text and later send this information to PAC_Agent for analysis modeling and displaying input, process and output. …”
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  10. 10
    Hardware And Software Partitioning Using Genetic Algorithm In Image Processing Application

    Hardware And Software Partitioning Using Genetic Algorithm In Image Processing Application by Loo, Fang Hean

    Published 2018
    “…In this project, HW-SW Partitioning is used as a process to map each task of image processing application to be executed either in software (Hard Processor System, HPS) or hardware (Field Programmable Gate Array, FPGA). …”
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    Monograph
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  11. 11
    Hardware Design Of Random Number Generator And Random Walk-Onboundary Algorithm To Compute Unit Cube Capacitance In Fpga

    Hardware Design Of Random Number Generator And Random Walk-Onboundary Algorithm To Compute Unit Cube Capacitance In Fpga by Niun, Cheah How

    Published 2016
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  12. 12
    MBIST implementation and evaluation in FPGA based on low-complexity March algorithms

    MBIST implementation and evaluation in FPGA based on low-complexity March algorithms by Jidin, Aiman Zakwan, Mispan, Mohd Syafiq, Hussin, Razaidi, Weng, Fook Lee

    Published 2024
    “…This paper presents the implementation and validation of MBIST controllers that applied the March AZ1 and March AZ2 algorithms in a Field-Programmable Gate Array (FPGA) device. …”
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  13. 13
    Computerised Heuristic Algorithm for Multi-location Lecture Timetabling

    Computerised Heuristic Algorithm for Multi-location Lecture Timetabling by Kuan, Huiggy

    Published 2020
    “…A two-stage heuristic algorithm is proposed to solve the multi-location timetabling problem on MSc HRD coursework programme. …”
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  14. 14
    Simplified VHDL Coding of Modified Non-Restoring Square Root Calculator

    Simplified VHDL Coding of Modified Non-Restoring Square Root Calculator by Jidin, Auzani

    Published 2012
    “…Square root calculation is one of the most useful and vital operation in digital signal processing which in recent generations of processors, the operation is performed by the hardware. …”
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  15. 15
    Digital Signal Processor (DSP) Design Using Very Long Instruction Word (VLIW) Architecture

    Digital Signal Processor (DSP) Design Using Very Long Instruction Word (VLIW) Architecture by Lee, Lini @ Lini Lee

    Published 2001
    “…Programmable digital signal processors (pDSP) are microprocessors that are specialized to perform well in digital signal processing-intensive applications. …”
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  16. 16
    Implementation of High Speed Large Integer Multiplication Algorithm on Contemporary Architecture

    Implementation of High Speed Large Integer Multiplication Algorithm on Contemporary Architecture by Chang, Boon Chiao

    Published 2018
    “…While GPU allowed users to configure each of the cores (processing units) to perform independent tasks, FPGA provides users a platform to design the processing units themselves to perform dedicated arithmetic and logic operation.In our GPU implementation, we present two different large integer algorithms implementation on two generation of NVIDIA GPU architectures, Kepler and Pascal. …”
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  17. 17
    A Novel Approach Of Groebner Bases Computation For Safety Analysis Of Distributed Discrete Controllers

    A Novel Approach Of Groebner Bases Computation For Safety Analysis Of Distributed Discrete Controllers by Alwi @ Suhaimi, Saifulza, Salleh, Mohd Rizal, Jaafar, Hazriq Izzuan, Ab Ghani, Mohd Ruddin, Md Fauadi, Muhammad Hafidz Fazli

    Published 2019
    “…It is well known that Programmable Logic Controller (PLC) related processes in manufacturing lines are safety-critical systems because of the increasing number of embedded functions and features. …”
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    Technical Report
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  18. 18
    The development of RNA logic gates library for the construction of molecular information processing circuits / Lee Yiling

    The development of RNA logic gates library for the construction of molecular information processing circuits / Lee Yiling by Lee , Yiling

    Published 2016
    “…At its core, these devices can process physical or chemical inputs to generate outputs imitating conventional Boolean logical operators. …”
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  19. 19
    Using genetic algorithms to optimise land use suitability

    Using genetic algorithms to optimise land use suitability by Pormanafi, Saeid

    Published 2012
    “…After calculating the fitness function, which it includes, cost and benefit matrix, cost of changing land uses together, offspring (the next generation) which are importantly generated. Selecting the offspring during the research has been based on their capability of elitism. …”
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  20. 20
    Runtime pluggable CPU scheduler for linux operating system

    Runtime pluggable CPU scheduler for linux operating system by Al-Maweri, Nasr Addin Ahmed Salem

    Published 2010
    “…The CPU scheduler uses different scheduling policies (algorithms) to manage such processes. Each scheduling policy has its own properties and suits specific applications or a specific environment. …”
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