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  1. 1
    RISC-V instruction set extension on blockchain application

    RISC-V instruction set extension on blockchain application by Cheong , Kin Seng

    Published 2024
    “…This would greatly shorten the instructions used by the algorithms and improved the execution time of the programmes. …”
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  2. 2
    Agent-based extraction algorithm for computational problem solving

    Agent-based extraction algorithm for computational problem solving by Rajabi, Maryam

    Published 2015
    “…With such results, it can be concluded that our proposed agent-based tool is able to help novice programmer in CPS.…”
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  3. 3
    Design Methodology and Analysis of Hash Function based-on Field Programmable Gate Array for Hash-based Message Authentication Code Application

    Design Methodology and Analysis of Hash Function based-on Field Programmable Gate Array for Hash-based Message Authentication Code Application by SHAMSIAH BINTI, SUHAILI

    Published 2025
    “…All these design methodologies aim to confirm the effect of HDL coding style on the performance of hardware algorithms implemented on FPGA. …”
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  4. 4
    Towards Maximising Hardware Resources and Design Efficiency via High-Speed Implementation of HMAC based on SHA-256 Design

    Towards Maximising Hardware Resources and Design Efficiency via High-Speed Implementation of HMAC based on SHA-256 Design by Shamsiah, Suhaili, Norhuzaimin, Julai, Rohana, Sapawi, Nordiana, Rajaee

    Published 2024
    “…This article analyses a fast implementation of the Hash-based Message Authentication Code (HMAC), which uses its algorithm to ensure the validity and integrity of data to optimise hardware efficiency and design efficacy using the SHA-256 algorithm. …”
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  5. 5
    Towards Maximising Hardware Resources and Design Efficiency via High-Speed Implementation of HMAC based on SHA-256 Design

    Towards Maximising Hardware Resources and Design Efficiency via High-Speed Implementation of HMAC based on SHA-256 Design by Shamsiah, Suhaili, Norhuzaimin, Julai, Rohana, Sapawi, Nordiana, Rajaee

    Published 2024
    “…This article analyses a fast implementation of the Hash-based Message Authentication Code (HMAC), which uses its algorithm to ensure the validity and integrity of data to optimise hardware efficiency and design efficacy using the SHA-256 algorithm. …”
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  6. 6
    Implementation Of FPGA Based Encryption Chip Using VHD - Data Encryption Standard (DES) Algorithm

    Implementation Of FPGA Based Encryption Chip Using VHD - Data Encryption Standard (DES) Algorithm by Lim, Mui Liang

    Published 2006
    “…The hardware based of encryption chip become realizable with Field Programmable Gate Arrays (FPGAs). …”
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    Monograph
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  7. 7
    Compiler-based prefetching algorithm for recursive data structure

    Compiler-based prefetching algorithm for recursive data structure by Anuar, Nurulhaini

    Published 2007
    “…This project investigates compiler-based prefetching for pointer based applications particularly those containing Recursive Data Structures (RDS) and designs the proposed algorithm. …”
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  8. 8
    Investigation on the dynamic of computation of semi autonomous evolutionary computation for syntactic optimization of a set of programming codes

    Investigation on the dynamic of computation of semi autonomous evolutionary computation for syntactic optimization of a set of programming codes by Mohammad Sigit Arifianto, Tze, Kenneth Kin Teo, Liau, Chung Fan, Liawas Barukang, Zaturrawiah Ali Omar

    Published 2007
    “…Genetic Algorithm as one of the Evolutionary Computation method improve the execution of parallel programming codes by optimizing the number of processors and the distribution of data. …”
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  9. 9
    Framework of Designing Multiple Microcontroller Based Applications

    Framework of Designing Multiple Microcontroller Based Applications by Selvakumar, Raja Saravana Kumar, Kamarul Hawari, Ghazali, Nik Mohd Kamil, Nik Yusof

    Published 2011
    “…These are presented in the second part of the paper describing the software part of the framework, which besides programming tools also discusses the code development tools. The stress is given to the use of assembly code and high-level tools, where the algorithms are described in the form of different graphical notations, i.e. block diagrams. …”
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  10. 10
    Design of a reconfigurable computing platform

    Design of a reconfigurable computing platform by Papu J.J., See O.H.

    Published 2023
    “…This paper describes a design of a reconfigurable computing platform (RCP) based on the Intel Xeon general purpose processor and the Nallatech BenNUEY-PCI-4E field programmable gate array (FPGA) motherboard. …”
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  11. 11
    Framework of Multi-Microcontroller Evaluation Tool for a use of Academic Environment

    Framework of Multi-Microcontroller Evaluation Tool for a use of Academic Environment by Selvakumar, Raja Saravana Kumar, Kamarul Hawari, Ghazali, Nik Mohd Kamil, Nik Yusof

    Published 2012
    “…These are presented in the second part of the paper describing the software part of the framework, which besides programming tools also discusses the code development tools. The stress is given to the use of assembly code and high-level tools, where the algorithms are described in the form of different graphical notations, i.e. block diagrams. …”
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  12. 12
    Design of field programmable gate array-based proportional-integral-derivative fuzzy logic controller with tunable ganin

    Design of field programmable gate array-based proportional-integral-derivative fuzzy logic controller with tunable ganin by Obaid, Zeyad Assi

    Published 2010
    “…To test the design, five case studies are used to test the controller in simulation environments in ModelSim and Matlab. The same design is coded in Matlab environment (MSBC) to enable a comparison with the FPGA-based design (FBC). …”
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  13. 13
    Digital beamforming implementation of switch-beam smart antenna system by using integrated digital signal processor and field-programmable gate array

    Digital beamforming implementation of switch-beam smart antenna system by using integrated digital signal processor and field-programmable gate array by Vakilian, Vida

    Published 2008
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  14. 14
    Digital Signal Processor (DSP) Design Using Very Long Instruction Word (VLIW) Architecture

    Digital Signal Processor (DSP) Design Using Very Long Instruction Word (VLIW) Architecture by Lee, Lini @ Lini Lee

    Published 2001
    “…However, the pDSP chip has better ability to perform number crunching algorithms simultaneously. The objective of this research is to design and implement a general-purpose programmable DSP (Digital Signal Processor) core. …”
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  15. 15
    FPGA implementation of multiplier for floating-point numbers based on IEEE 754-2008 standard

    FPGA implementation of multiplier for floating-point numbers based on IEEE 754-2008 standard by Shyamsi, M., Ibrahimy, Muhammad Ibn, Motakabber, S. M. A., Ahsan, M. R.

    Published 2015
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  16. 16
    Stereo vision for visual object tracking and distance measurement assessment / Sukarnur Che Abdulla...[et al.]

    Stereo vision for visual object tracking and distance measurement assessment / Sukarnur Che Abdulla...[et al.] by Che Abdullah, Sukarnur, Amari, Mohamad Dzulhelmy, Ohka, Masahiro

    Published 2019
    “…The system programme codes is one of the issue need to confront consequent since there are various sorts of calculation that are in the same field, however has unmistakable of use. …”
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  17. 17
    Implementation of luo-rudi phase 1 cardiac cell excitation model in FPGA

    Implementation of luo-rudi phase 1 cardiac cell excitation model in FPGA by Othman, Norliza

    Published 2017
    “…For the rapid prototyping, a nonlinear Ordinary Differential Equation (ODE)­based algorithm of the LR-I model is implemented by using Hardware Description Language (I-IDL) Coder that is capable to convert MATLAB Simulink blocks designed into a synthesisable VHSIC Hardware Description Language (VHDL) code and verified using the FPGA-In-the Loop (FIL) Co-simulator. …”
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  18. 18
    Application Specific Instruction Set Processor (ASIP) Design In An 8-Bit Softcore Microcontroller

    Application Specific Instruction Set Processor (ASIP) Design In An 8-Bit Softcore Microcontroller by Salim, Sani Irwan, Soo, Yew Guan, Samsudin, Sharatul Izah

    Published 2018
    “…The microcontroller-based system is currently having a tremendous boost in demand in line with the Industrial Revolution 4.0. …”
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  19. 19
    Design and development of high performance swa cell design for local DNA sequence alignment

    Design and development of high performance swa cell design for local DNA sequence alignment by Syed Abdul Rahman, Syed Abdul Mutalib Al Junid

    Published 2017
    “…Moreover, there have been intensive efforts in improving the performance of the sequence alignment process via hardware-based acceleration using the Field Programmable Gate Array (FPGA). …”
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  20. 20
    Using genetic algorithms to optimise land use suitability

    Using genetic algorithms to optimise land use suitability by Pormanafi, Saeid

    Published 2012
    “…In this study, under environmentfriendliness objective, based on multi-agent genetic algorithms, was developed a geospatial model for the land use allocation. …”
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