Search Results - (( java interaction efficient algorithm ) OR ( program implementation max algorithm ))

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  1. 1

    A multidimensional data descriptor tool based on fuzzy min max neural network algorithm by Fatin Nurjannah, Salauddin

    Published 2018
    “…They have been compare for their advantages and disadvantages. The implementation of Fuzzy Min Max Neural Network technique has been applied using Matlab Programming. …”
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    Undergraduates Project Papers
  2. 2

    An event-driven simulation for highest urgency first (HUF) : a latency and modulation aware bandwidth allocation algorithm for WiMAX base stations. by Naghshbandi, Danial, Subramaniam, Shamala, Moghadam, Saeed Rahimi

    Published 2013
    “…This research has focused at developing a discrete-event simulator to implement bandwidth allocation algorithms for a WiMAX base station.The highest urgency first algorithm has been utilized as a benchmark deployment algorithm in order to provide: dynamic downlink/uplink adjustment and latency guarantee for real-time applications. …”
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    Article
  3. 3

    Maximum 2-satisfiability in radial basis function neural network by Shehab Abdulhabib Alzaeemi, Saratha Sathasivam, Mohd Shareduwan Mohd Kasihmuddin, Mohd. Asyraf Mansor

    Published 2020
    “…The simulated results suggest that the proposed algorithm is effective in doing MAX2SAT logic programming by analysing the performance by obtaining lower Root Mean Square Error, high ratio of satisfied clauses and lesser CPU time.…”
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    Article
  4. 4

    Network game (Literati) / Chung Mei Kuen by Chung, Mei Kuen

    Published 2003
    “…It should be an interesting, time and value worth topic to research on. By using Java applet, it will give a good interactive response since it does not suffer from the delays or variability of bandwidth associated with network connection. …”
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    Thesis
  5. 5

    Digital beamforming implementation of switch-beam smart antenna system by using integrated digital signal processor and field-programmable gate array by Vakilian, Vida

    Published 2008
    “…After modeling, the algorithm is implemented in DSP. By using the Hardware- In-Loop facility of DSP, the comparison between hardware implementation and software modeling is performed. …”
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    Thesis
  6. 6

    Input-output based relation combinatorial testing using whale optimization algorithm for generating near optimum number of test suite by Suali, Anjila J., Nuraminah Ramli, Rozmie Razif Othman, Hasneeza Liza Zakaria, Iszaidy Ismail, Nor Shahida Mohd Jamail, Rimuljo Hendradi, Nurol Husna Che Rose

    Published 2025
    “…Given the impracticality of testing every possible interaction due to time, budget, and resource constraints, combinatorial testing, which is t-way testing, is adopted to cover parameter interactions efficiently. …”
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    Article
  7. 7

    Designing and Developing an Intelligent Congkak by Muhammad Safwan, Mohd Shahidan

    Published 2011
    “…and “Can Min-Max algorithm (MM) be speeded up by using NN as a forward-pruning method?”. …”
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    Thesis
  8. 8

    CPLD based controller for single phase inverters by Saiman, Suhaimi

    Published 2007
    “…A type of filter is used to improve the distortion in the output waveform. A design and implementation of PWM by using complex programmable logic device (CPLD) from Altera MaxPlus II is constructed and programmed. …”
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    Thesis
  9. 9

    CPLD based controller for single phase inverters by Saiman, Suhaimi

    Published 2007
    “…A type of filter is used to improve the distortion in the output waveform. A design and implementation of PWM by using complex programmable logic device (CPLD) from Altera MaxPlus II is constructed and programmed. …”
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    Thesis
  10. 10

    Fast fourier transform processor implementation for high inputs on field programmable gates array by Ali Abbas, Zaid

    Published 2018
    “…Verilog Hardware Description Language (Verilog HDL) and VHDL Languages are used to program the algorithms into the FPGA. FFT algorithms will be implemented for up to 4096 points to measure the high load processing capability. …”
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    Thesis
  11. 11

    Mathematical simulation for 3-dimensional temperature visualization on open source-based grid computing platform by Alias, Norma, Satam, Noriza, Abd. Ghaffar, Zarith Safiza, Darwis, Roziha, Hamzah, Norhafiza, Islam, Md. Rajibul

    Published 2009
    “…Each web services are easily maintainable since there is loose coupling between interacting nodes. The development of this architecture is based on several programming language as it involves algorithm implementation on C, parallelization using Parallel Virtual Machine (PVM) and Java for web services development. …”
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    Conference or Workshop Item
  12. 12

    FPGA Implementation of Emergency Door Car Entry System by Zaini Sulaiman

    Published 2008
    “…Emergency door car entry system can be implemented using Field Programmable Gate Array (FPGA) board. …”
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    Learning Object
  13. 13

    Network monopoly / Tan Kean Yeap by Tan , Kean Yeap

    Published 2002
    “…The main aspect of this thesis is to produce a network monopoly system, which process multiple game sessions concurrently, enabling users to play the graphical game with people within the network. The algorithm design and implementation method mustnot only be workable, but also highly efficient in terms of execution speed and respond time. …”
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    Thesis
  14. 14

    Development of mobile application of event assistant and booking sport facilities for UiTM Seremban 3 Campus using wofkflow management system / Ahmad Haiqal Abd Halim, Ahmad Yusuf... by Abd Halim, Ahmad Haiqal, Che Hassan, Ahmad Yusuf, Hambari, Mohd Norhafizi

    Published 2019
    “…In this research, its content of the step on how to apply the method of WfMS in a mobile application with the use of an android studio. The algorithm for the WfMS is written using Java script in this research. …”
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    Student Project
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    Digital Signal Processor (DSP) Design Using Very Long Instruction Word (VLIW) Architecture by Lee, Lini @ Lini Lee

    Published 2001
    “…However, the pDSP chip has better ability to perform number crunching algorithms simultaneously. The objective of this research is to design and implement a general-purpose programmable DSP (Digital Signal Processor) core. …”
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    Thesis