Search Results - (( java implication rsa algorithm ) OR ( proposed implementation level algorithm ))

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  1. 1

    Low-level hybridization scripting language with dynamic parameterization in PSO-GA / Suraya Masrom by Masrom, Suraya

    Published 2015
    “…The scripting language is designed and developed based on the algorithm structure that is defined in the proposed implementation frameworks with the dynamic parameterization. …”
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    Thesis
  2. 2

    Enhancement of {0, 1, 3}-NAF Recoding Algorithm using Block Method Technique for Elliptic Curve Cryptosystem by Bafandehkar, Mohsen

    Published 2015
    “…The running time is used to measure the performance of the based and the proposed algorithm. The focus of this research is on the enhancement of the scalar arithmetic level by designing and analysing an inexpensive {0, 1, 3}-NAF scalar recoding algorithm in an effort to maintain the Hamming weight for the based algorithm and reduce the algorithm complexity. …”
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    Thesis
  3. 3

    Register Transfer Level Implementation Of Pooling - Based Feature Extraction For Finger Vein Identification by Mohamed Ali, Mohamed Hassan

    Published 2017
    “…The proposed algorithm was implemented on hardware using Verilog-HDL, and targeting Field Programmable Gate Array (FPGA) applications. …”
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    Thesis
  4. 4

    Adaptive routing algorithms and implementation for TESH network by Miura, Yasuyuki, Kaneko, Masahiro, Rahman, M.M. Hafizur, Watanabe, Shigeyoshi

    Published 2013
    “…In this paper, we implement these routers using VHDL and evaluate the hardware cost and delay for the proposed routing algorithms and compare it with the dimension order routing. …”
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    Article
  5. 5

    Implementation of High Speed Large Integer Multiplication Algorithm on Contemporary Architecture by Chang, Boon Chiao

    Published 2018
    “…Both radix-2 and radix-4 FNT modules are implemented and a further design of radix-4 FNT module, named radix-4 CTFNT module that is optimized to fit the multiplication algorithm we used is proposed. …”
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    Final Year Project / Dissertation / Thesis
  6. 6

    Selective harmonic elimination in multilevel inverter using hybrid APSO algorithm by Memon, Mudasir Ahmed, Mekhilef, Saad, Mubin, Marizan

    Published 2018
    “…The proposed algorithm is applicable to all levels of MLI having equal and non-equal DC sources. …”
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    Article
  7. 7

    Three-phase three-level shunt active power filter with simplified synchronous reference frame by Hoon, Yap, Mohd Radzi, Mohd Amran, Hassan, Mohd Khair, Mailah, Nashiren Farzilah

    Published 2016
    “…The proposed algorithm is developed and evaluated in MATLAB / Simulink. …”
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    Conference or Workshop Item
  8. 8
  9. 9

    An improved RSA cryptosystem based on thread and CRT / Saheed Yakub Kayode and Gbolagade Kazeem Alagbe by Yakub Kayode, Saheed, Kazeem Alagbe, Gbolagade

    Published 2017
    “…Java programming language is used to implement the algorithm. Experimental results indicate that as the thread level increases, the encryption and decryption time, which is the most time consuming operation, decreases which shows an improved speed of the RSA cryptosystem.The proposed implementation has a great potential to effectively deal with the RSA algorithm slow speed.…”
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    Article
  10. 10

    A simplified synchronous reference frame for indirect current controlled three-level inverter-based shunt active power filters by Hoon, Yap, Mohd Radzi, Mohd Amran, Hassan, Mohd Khair, Mailah, Nashiren Farzilah, Abdul Wahab, Noor Izzri

    Published 2016
    “…A laboratory prototype utilizing a TMS320F28335 digital signal processor (DSP) is also implemented to validate effectiveness of the proposed algorithm. …”
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    Article
  11. 11

    Harmony search-based robust optimal controller with prior defined structure by Rafieishahemabadi, Ali

    Published 2013
    “…In this approach, a combination of interacting two levels HS optimization algorithm is presented. In the first level, a new method for analytical formulation of integral square error cost function based on controller variables is elaborated for performance evaluation purposes by the proposed optimization algorithm. …”
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    Thesis
  12. 12
  13. 13

    Fast algorithm analysis and bit-serial architecture design for sub-pixel motion estimation in H.264 by Fatemi, M.R.H., Ates, H.F., Salleh, R.

    Published 2010
    “…In the architecture level, we propose a novel bit-serial architecture for our algorithm. …”
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    Article
  14. 14

    Implementation of perez-dumortier calibration algorithm by Jedol Dayou, Chang, Jackson Hian Wui, Justin Sentian

    Published 2014
    “…The implementation of the filtration procedure in step-by-step is discussed to render better framework of the proposed calibration algorithm. …”
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    Chapter In Book
  15. 15

    Hybrid ant colony system algorithm for static and dynamic job scheduling in grid computing by Alobaedy, Mustafa Muwafak Theab

    Published 2015
    “…These proposed hybrid algorithms will enhance ACS in terms of exploration mechanism and solution refinement by implementing low and high levels hybridization of ACS, GA, and TS algorithms. …”
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    Thesis
  16. 16

    Implementation of booth multiplier algorithm using Radix-4 in FPGA by Anis Shahida Mokhtar, Chew, Sue Ping, Muhamad Faiz Md Din, Nazrul Fariq Makmor, Muhammad Asyraf Che Mahadi

    Published 2021
    “…The proposed design is simulated by using Verilog HDL in Quartus II and implemented in Cyclone II FPGA. …”
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    Article
  17. 17

    Low-level hybridization scripting language with dynamic parameterization in PSO-GA / Suraya Masrom by Masrom, Suraya

    Published 2015
    “…The research has proposed new implementation frameworks and new scripting language with the dynamic parameterization……”
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    Book Section
  18. 18

    Boundary control of a dual-output boost converter with multilevel inverter topology / Messikh Tarek by Messikh, Tarek

    Published 2017
    “…Steady state characteristics and large signal stability analysis are carried out for the DOBC, the sensorless control algorithm is implemented in TMS320F2812. A three-level algorithm of SVPWM is implemented in Altera DE2 board to control the three-level inverter which ensures lower hardware resource usage and satisfy the switching time criteria. …”
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    Thesis
  19. 19

    Development of heuristic task scheduling algorithm in cloud computing by Diallo, Laouratou, Hassan Abdalla Hashim, Aisha, Olanrewaju, Rashidah Funke

    Published 2016
    “…The proposed algorithm is followed by a discussion in order to make smoother the implementation. …”
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    Proceeding Paper
  20. 20

    New perturb and observe algorithm based on trapezoidal rule: uniform and partial shading conditions by Mahmod Mohammad Altwallbah, Neda, Mohd Radzi, Mohd Amran, Azis, Norhafiz, Shafie, Suhaidi, Mohd Zainuri, Muhammad Ammirrul Atiqi

    Published 2022
    “…The proposed Trapezoidal rule based P&O algorithm is evaluated under three conditions: (1) under uniform irradiance (2) under shading conditions and (3) under sudden and step changes in irradiation levels as well as the transition between shading patterns. …”
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    Article