Search Results - (( java implementation search algorithm ) OR ( using code max algorithm ))

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  1. 1

    Comparison of Search Algorithms in Javanese-Indonesian Dictionary Application by Yana Aditia, Gerhana, Nur, Lukman, Arief Fatchul, Huda, Cecep Nurul, Alam, Undang, Syaripudin, Devi, Novitasari

    Published 2020
    “…This study aims to compare the performance of Boyer-Moore, Knuth morris pratt, and Horspool algorithms in searching for the meaning of words in the Java-Indonesian dictionary search application in terms of accuracy and processing time. …”
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    Journal
  2. 2

    Direct approach for mining association rules from structured XML data by Abazeed, Ashraf Riad

    Published 2012
    “…The thesis also provides a two different implementation of the modified FLEX algorithm using a java based parsers and XQuery implementation. …”
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    Thesis
  3. 3

    Comparison of performances of Jaya Algorithm and Cuckoo Search algorithm using benchmark functions by Ahmed, Mashuk, Nasser, Abdullah B., Kamal Z., Zamli, Heripracoyo, Sulistyo

    Published 2022
    “…This paper aims to compare the performance of two metaheuristic algorithms which are Jaya Algorithm (JA) and Cuckoo Search (CS) using some common benchmark functions. …”
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    Conference or Workshop Item
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    Visualisation tool to study malaria transmission using network modelling by Wong,, Ji Yeh

    Published 2014
    “…In addition, the Hypertext Induced Topical Search (HITS) web search algorithm was adapted to implement a search engine, which uses the bipartite contact network as the input. …”
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    Final Year Project Report / IMRAD
  7. 7

    WIMAX TESTBED by KOH , MINGHAO

    Published 2008
    “…This project also takes the first few steps of hardware implementation by using Real Time Workshop to convert the Simulink model into C codes which run outside MATLAB. …”
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    Final Year Project
  8. 8

    Digital beamforming implementation of switch-beam smart antenna system by using integrated digital signal processor and field-programmable gate array by Vakilian, Vida

    Published 2008
    “…After modeling, the algorithm is implemented in DSP. By using the Hardware- In-Loop facility of DSP, the comparison between hardware implementation and software modeling is performed. …”
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    Thesis
  9. 9

    An Educational Tool Aimed at Learning Metaheuristics by Kader, Md. Abdul, Jamaluddin, Jamal A., Kamal Z., Zamli

    Published 2020
    “…Initially, this tool adopts only Crow Search, Jaya, and Sine Cosine algorithms. But more metaheuristics will be included in future research. …”
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    Conference or Workshop Item
  10. 10

    Embedded system for indoor guidance parking with Dijkstra’s algorithm and ant colony optimization by Mohammad Ata, Karimeh Ibrahim

    Published 2019
    “…This study proposes a car parking management system which applies Dijkstra’s algorithm, Ant Colony Optimization (ACO) and Binary Search Tree (BST) in structuring a guidance system for indoor parking. …”
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    Thesis
  11. 11

    The design of viterbi decoder for low power consumption space time trellis code without adder architecture using RTL model by Abu, Mohd Azlan, Harun, Harlisya, Harmin, Mohammad Yazdi, Abdul Wahab, Noor Izzri, Abdul Kadir, Muhd Khairulzaman

    Published 2016
    “…Design/methodology/approach – The code uses a generator matrix designed for four-state space time trellis code (STTC) that uses quadrature phase shift keying (QPSK) modulation scheme. …”
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    Article
  12. 12

    Features selection for intrusion detection system using hybridize PSO-SVM by Tabaan, Alaa Abdulrahman

    Published 2016
    “…Hybridize Particle Swarm Optimization (PSO) as a searching algorithm and support vector machine (SVM) as a classifier had been implemented to cope with this problem. …”
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    Thesis
  13. 13

    Dynamic transmit antenna shuffling scheme for hybrid multiple-input multiple-output in layered architecture by Chong, Jin Hui

    Published 2010
    “…Finally, the performance of V-BLAST/STBC transceiver scheme with proposed LC-QR algorithm is compared with other MIMO systems, such as V-BLAST and orthogonal space-time block codes. …”
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    Thesis
  14. 14

    FPGA Implementation of Emergency Door Car Entry System by Zaini Sulaiman

    Published 2008
    “…Altera® Quartus II is used to create the source code and download it into the FPGA board. …”
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    Learning Object
  15. 15

    A multilayered convolutional sparse coding framework for modeling of pooling operation of convolution neural networks by , Abdul Wahid, Khan, Adnan Umar, , Mukhtarullah, Khan, Sheroz, Shah, Jawad

    Published 2019
    “…The multilayered version of CSC(ML-CSC) is shown to be connected to forward pass of CNNs and dictionary learning and sparse coding algorithms of this model are analyzed for solving classification and inverse problems in image processing. …”
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    Proceeding Paper
  16. 16

    Fractal coding of bio-metric image for face authentication by Ahadullah, Md

    Published 2021
    “…This thesis implements the algorithms for the Methods of CPM, BPBM fractal coding, and its application. …”
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    Thesis
  17. 17

    Design of an OFDM transmitter and receiver using FPGA by Loo, Kah Cheng

    Published 2004
    “…This performance of the coding is analyzed from the result of timing simulation using Altera Max Plus II…”
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    Thesis
  18. 18

    Web-based expert system for material selection of natural fiber- reinforced polymer composites by Ahmed Ali, Basheer Ahmed

    Published 2015
    “…Secondly, an expert system using Java programming technology with two tiers of search engine was developed to perform a fast selection of candidate materials in huge volume. …”
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    Thesis
  19. 19

    Competitive improvement of the time complexity to encode fractal image: by applying symmetric central pixel of the block by Md Ahadullah, Sapar, Siti Hasana, Al-Saidi, Nadia Mohammed Ghanim, Md Said, Mohamad Rushdan

    Published 2021
    “…As a consequence, the symmetrical CP of odd pixels block, reduction of block space, and edge pixel selection accomplished faster coding and competitive image quality than existing known exhaustive search algorithms.…”
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    Article
  20. 20

    Development of low power viterbi decoder on complex programmable logic device platform by Abu, Mohd Azlan

    Published 2018
    “…Consequently, the number of logic gates and the total power consumption of the STTC Viterbi decoder can be reduced by using the new algorithms. The proposed algorithms have been designed and implemented by using MATLAB, Altera Quartus 2 and Altera MAX V CPLD board. …”
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    Thesis