Search Results - (( java implementation phase algorithm ) OR ( using programmes max algorithm ))

Search alternatives:

  • Showing 1 - 11 results of 11
Refine Results
  1. 1
    Web-based clustering tool using fuzzy k-mean algorithm / Ahmad Zuladzlan Zulkifly

    Web-based clustering tool using fuzzy k-mean algorithm / Ahmad Zuladzlan Zulkifly by Zulkifly, Ahmad Zuladzlan

    Published 2019
    “…All the algorithm for the engine has been developed by using Java script language. …”
    Get full text
    Get full text
    Thesis
    Save to List
    Saved in:
  2. 2
    Digital beamforming implementation of switch-beam smart antenna system by using integrated digital signal processor and field-programmable gate array

    Digital beamforming implementation of switch-beam smart antenna system by using integrated digital signal processor and field-programmable gate array by Vakilian, Vida

    Published 2008
    Get full text
    Get full text
    Thesis
    Save to List
    Saved in:
  3. 3
    FPGA Implementation of Emergency Door Car Entry System

    FPGA Implementation of Emergency Door Car Entry System by Zaini Sulaiman

    Published 2008
    “…Emergency door car entry system can be implemented using Field Programmable Gate Array (FPGA) board. …”
    Get full text
    Learning Object
    Save to List
    Saved in:
  4. 4
    Optimal route checking using genetic algorithm for UiTM's bus services / Tengku Salman Fathi Tengku Jaafar

    Optimal route checking using genetic algorithm for UiTM's bus services / Tengku Salman Fathi Tengku Jaafar by Tengku Jaafar, Tengku Salman Fathi

    Published 2006
    “…Although from human logical thinking, the route can be generated easily but the calculation of checking the route whether it is optimal route or not is difficult and will take long time to be implemented. This research study with the development of the Optimal Route Checking Using Genetic Algorithm system should solve this scenario. …”
    Get full text
    Get full text
    Thesis
    Save to List
    Saved in:
  5. 5
    MBIST implementation and evaluation in FPGA based on low-complexity March algorithms

    MBIST implementation and evaluation in FPGA based on low-complexity March algorithms by Jidin, Aiman Zakwan, Mispan, Mohd Syafiq, Hussin, Razaidi, Weng, Fook Lee

    Published 2024
    “…March algorithms are widely used in Memory Built-In Self-Test (MBIST) on-chip memory testing, providing linear test complexities that reduce the test time and cost. …”
    Get full text
    Get full text
    Get full text
    Article
    Save to List
    Saved in:
  6. 6
    Development of low power viterbi decoder on complex programmable logic device platform

    Development of low power viterbi decoder on complex programmable logic device platform by Abu, Mohd Azlan

    Published 2018
    Get full text
    Get full text
    Get full text
    Thesis
    Save to List
    Saved in:
  7. 7
    Fast fourier transform processor implementation for high inputs on field programmable gates array

    Fast fourier transform processor implementation for high inputs on field programmable gates array by Ali Abbas, Zaid

    Published 2018
    “…Verilog Hardware Description Language (Verilog HDL) and VHDL Languages are used to program the algorithms into the FPGA. FFT algorithms will be implemented for up to 4096 points to measure the high load processing capability. …”
    Get full text
    Get full text
    Get full text
    Thesis
    Save to List
    Saved in:
  8. 8
    CPLD based controller for single phase inverters

    CPLD based controller for single phase inverters by Saiman, Suhaimi

    Published 2007
    “…A design and implementation of PWM by using complex programmable logic device (CPLD) from Altera MaxPlus II is constructed and programmed. …”
    Get full text
    Get full text
    Thesis
    Save to List
    Saved in:
  9. 9
    CPLD based controller for single phase inverters

    CPLD based controller for single phase inverters by Saiman, Suhaimi

    Published 2007
    “…A design and implementation of PWM by using complex programmable logic device (CPLD) from Altera MaxPlus II is constructed and programmed. …”
    Get full text
    Get full text
    Thesis
    Save to List
    Saved in:
  10. 10
    Digital Signal Processor (DSP) Design Using Very Long Instruction Word (VLIW) Architecture

    Digital Signal Processor (DSP) Design Using Very Long Instruction Word (VLIW) Architecture by Lee, Lini @ Lini Lee

    Published 2001
    “…In order to gain most benefit from the architecture, "Field Programmable Gate Array" (FPGA) technology can be used. …”
    Get full text
    Get full text
    Thesis
    Save to List
    Saved in:
  11. 11
    The design of viterbi decoder for low power consumption space time trellis code without adder architecture using RTL model

    The design of viterbi decoder for low power consumption space time trellis code without adder architecture using RTL model by Abu, Mohd Azlan, Harun, Harlisya, Harmin, Mohammad Yazdi, Abdul Wahab, Noor Izzri, Abdul Kadir, Muhd Khairulzaman

    Published 2016
    “…The decoding process has been carried out using maximum likelihood sequences estimation through the Viterbi algorithm. …”
    Get full text
    Get full text
    Get full text
    Article
    Save to List
    Saved in:

Search Tools: