Search Results - (( java implementation phase algorithm ) OR ( using programme new algorithm ))

Search alternatives:

Refine Results
  1. 1
    Web-based clustering tool using fuzzy k-mean algorithm / Ahmad Zuladzlan Zulkifly

    Web-based clustering tool using fuzzy k-mean algorithm / Ahmad Zuladzlan Zulkifly by Zulkifly, Ahmad Zuladzlan

    Published 2019
    “…All the algorithm for the engine has been developed by using Java script language. …”
    Get full text
    Get full text
    Thesis
    Save to List
    Saved in:
  2. 2
    Optimal route checking using genetic algorithm for UiTM's bus services / Tengku Salman Fathi Tengku Jaafar

    Optimal route checking using genetic algorithm for UiTM's bus services / Tengku Salman Fathi Tengku Jaafar by Tengku Jaafar, Tengku Salman Fathi

    Published 2006
    “…Although from human logical thinking, the route can be generated easily but the calculation of checking the route whether it is optimal route or not is difficult and will take long time to be implemented. This research study with the development of the Optimal Route Checking Using Genetic Algorithm system should solve this scenario. …”
    Get full text
    Get full text
    Thesis
    Save to List
    Saved in:
  3. 3
    RISC-V instruction set extension on blockchain application

    RISC-V instruction set extension on blockchain application by Cheong , Kin Seng

    Published 2024
    “…This would greatly shorten the instructions used by the algorithms and improved the execution time of the programmes. …”
    Get full text
    Get full text
    Final Year Project / Dissertation / Thesis
    Save to List
    Saved in:
  4. 4
    Intelligent muslim prayer counter with programmable interface controller (PIC)

    Intelligent muslim prayer counter with programmable interface controller (PIC) by Hassim, Hasniza

    Published 2014
    Get full text
    Get full text
    Get full text
    Get full text
    Thesis
    Save to List
    Saved in:
  5. 5
    Development of low power viterbi decoder on complex programmable logic device platform

    Development of low power viterbi decoder on complex programmable logic device platform by Abu, Mohd Azlan

    Published 2018
    Get full text
    Get full text
    Get full text
    Thesis
    Save to List
    Saved in:
  6. 6
    Improved genetic algorithm for direct current motor high speed controller implemented on field programmable gate array

    Improved genetic algorithm for direct current motor high speed controller implemented on field programmable gate array by Alkhafaji, Falih Salih

    Published 2019
    “…The third methodology is to integrate the proposed controller on FPGA, using a new method to run the design based simulink model. …”
    Get full text
    Get full text
    Thesis
    Save to List
    Saved in:
  7. 7
    Implementation of PRINCE algorithm in FPGA

    Implementation of PRINCE algorithm in FPGA by Abbas Y.A., Jidin R., Jamil N., Z'aba M.R., Rusli M.E., Tariq B.

    Published 2023
    Conference Paper
    Save to List
    Saved in:
  8. 8
    Analysis on background subtraction for street surveillance

    Analysis on background subtraction for street surveillance by Zainuddin, N. Afiqah, Mohd Mustafah, Yasir, Azman, Amelia Wong, Rashidan, M. Ariff, A. Aziz, Nor Nadirah

    Published 2014
    Get full text
    Get full text
    Get full text
    Get full text
    Proceeding Paper
    Save to List
    Saved in:
  9. 9
    Design and implementation of multimedia digital matrix system

    Design and implementation of multimedia digital matrix system by Chui, Yew Leong, Ramli, Abdul Rahman, Perumal, Thinagaran, Sulaiman, Mohd Yusof, Ali, Mohd Liakot

    Published 2005
    “…Due to the issues of signal integrity in high-speed digital design, a new adaptive channel synchronization algorithm has been developed. …”
    Get full text
    Get full text
    Conference or Workshop Item
    Save to List
    Saved in:
  10. 10
    Developed method of FPGA-based fuzzy logic controller design with the aid of conventional PID algorithm

    Developed method of FPGA-based fuzzy logic controller design with the aid of conventional PID algorithm by Obaid, Zeyad Assi, Sulaiman, Nasri, Hamidon, Mohd Nizar

    Published 2009
    “…This method also enables us to design the controller to work as PDFLC, PIFLC or PIDFLC depending on two (one-bit) external signals with programmable fuzzy sets and programmable rule table using VHDL language for implementation on FPGA device, and to employ the new technique of fuzzy algorithm in order to serve a wide range of the physical systems which require a real-time operation. …”
    Get full text
    Get full text
    Get full text
    Article
    Save to List
    Saved in:
  11. 11
    Design of an advanced encryption standard crypto-processor core for field programmable gate array implementation

    Design of an advanced encryption standard crypto-processor core for field programmable gate array implementation by Ismail, Mohd. Izuan

    Published 2006
    “…The proposed AES Crypto-Processor accelerates the AES algorithm in reconfigurable Field Programmable Gate Arrays (FPGA). …”
    Get full text
    Get full text
    Thesis
    Save to List
    Saved in:
  12. 12
    A lightweight and secure algorithm of elliptic curve cryptography scalar multiplication using Q-NAF method in Lopez-Dahab coordinate

    A lightweight and secure algorithm of elliptic curve cryptography scalar multiplication using Q-NAF method in Lopez-Dahab coordinate by Abdulraheem, Waleed Khalid Amin

    Published 2019
    “…By combining the proposed scalar arithmetic and the new point arithmetic 5P, a new scalar multiplication algorithm was developed. …”
    Get full text
    Get full text
    Thesis
    Save to List
    Saved in:
  13. 13
    Needleman wunsch implementation for SPAM/UCE inline filter

    Needleman wunsch implementation for SPAM/UCE inline filter by Tamil E.M., Idris M.Y.I., Thong C.M., Jali M.Z., Madihah Mohd Saudi

    Published 2024
    Conference Paper
    Save to List
    Saved in:
  14. 14
    A new parameterized architectural design for SENSE reconstruction

    A new parameterized architectural design for SENSE reconstruction by Siddiqui, M.F., Reza, A.W., Kanesan, J., Omer, H.

    Published 2014
    “…This architecture is also synthesized for Field Programmable Gate Array (FPGA). Complex multiplier, divider and complex matrix multiplier modules are designed to implement the algorithm. …”
    Get full text
    Get full text
    Conference or Workshop Item
    Save to List
    Saved in:
  15. 15
    MBIST implementation and evaluation in FPGA based on low-complexity March algorithms

    MBIST implementation and evaluation in FPGA based on low-complexity March algorithms by Jidin, Aiman Zakwan, Mispan, Mohd Syafiq, Hussin, Razaidi, Weng, Fook Lee

    Published 2024
    “…March algorithms are widely used in Memory Built-In Self-Test (MBIST) on-chip memory testing, providing linear test complexities that reduce the test time and cost. …”
    Get full text
    Get full text
    Get full text
    Article
    Save to List
    Saved in:
  16. 16
    New CFAR algorithm and circuit development for radar receiver

    New CFAR algorithm and circuit development for radar receiver by Kamal, Mustafa Subhi

    Published 2020
    Get full text
    Get full text
    Get full text
    Get full text
    Thesis
    Save to List
    Saved in:
  17. 17
    Lightweight PRINCE algorithm IP core for securing GSM messaging using FPGA

    Lightweight PRINCE algorithm IP core for securing GSM messaging using FPGA by Abbas Y.A., Jidin R., Jamil N., Z'aba M.R.

    Published 2023
    “…In this study, a new security system design for securing GSM messaging with a lightweight PRINCE algorithm Intellectual Property (IP) Core using Field Programmable Gate Arrays (FPGA) is proposed. …”
    Article
    Save to List
    Saved in:
  18. 18
    Design and development of high performance swa cell design for local DNA sequence alignment / Syed Abdul Mutalib Al Junid Syed Abdul Rahman

    Design and development of high performance swa cell design for local DNA sequence alignment / Syed Abdul Mutalib Al Junid Syed Abdul Rahman by Syed Abdul Rahman, Syed Abdul Mutalib Al Junid

    Published 2017
    “…This study proposed three new DNA sequence alignment accelerator system cell design and architecture based on the Smith-Waterman Algorithm (SWA) named as the new Optimized SWA Linear Gap Penalty (OSL), Optimized SWA Affine Gap Penalty (OSA), and Optimized Recursive Variable Expansion SWA Linear Gap Penalty (ORSL).…”
    Get full text
    Get full text
    Book Section
    Save to List
    Saved in:
  19. 19
    Design and development of high performance swa cell design for local DNA sequence alignment

    Design and development of high performance swa cell design for local DNA sequence alignment by Syed Abdul Rahman, Syed Abdul Mutalib Al Junid

    Published 2017
    “…This study proposed three new DNA sequence alignment accelerator system cell design and architecture based on the Smith-Waterman Algorithm (SWA) named as the new Optimized SWA Linear Gap Penalty (OSL), Optimized SWA Affine Gap Penalty (OSA), and Optimized Recursive Variable Expansion SWA Linear Gap Penalty (ORSL). …”
    Get full text
    Get full text
    Thesis
    Save to List
    Saved in:
  20. 20
    Hardware implementation of RC4A stream cipher

    Hardware implementation of RC4A stream cipher by Al Noman, Abdullah, Mohd Sidek, Roslina, Ramli, Abdul Rahman

    Published 2009
    “…The cipher was designed using Verilog hardware description language and implemented into a single Altera APEXTM 20K200E Field Programmable Gate Array (FPGA).…”
    Get full text
    Get full text
    Get full text
    Article
    Save to List
    Saved in:

Search Tools: