Search Results - (( java implementation phase algorithm ) OR ( programmes _ path algorithm ))

Web-based clustering tool using fuzzy k-mean algorithm / Ahmad Zuladzlan Zulkifly by Zulkifly, Ahmad Zuladzlan

“…All the algorithm for the engine has been developed by using Java script language. …”
Get full text
Get full text

Graph processing hardware accelerator for shortest path algorithms in nanometer very large-scale integration interconnect routing by Ch'ng, Heng Sun

“…This thesis proposes a graph processing hardware accelerator for shortest path algorithms applied in nanometer VLSI interconnect routing problems. …”
Get full text
Get full text
Get full text

Develpoment of combinatorial optimisation for cutting tool path strategy by Alsultaney, Hazem K., Mohd Ariffin, Mohd Khairol Anuar, Baharudin, B. T. Hang Tuah, Ali, Aidy, Mustapha, Faizal

“…The target was to develop models which mimic the actual cutting process using the Finite Element Method (FEM) and to validate the developed tool path strategy algorithm with the actual machining process and to programmer the developed algorithm into software. …”
Get full text
Get full text

Reusable data-path architecture for encryption-then-authentication on FPGA by Abbas Y.A., Jidin R., Jamil N., Zaba M.R.

“…For this proposed reusable data-path, we have chosen LED algorithm for encryption and then PHOTON to generate the MAC code. …”

An experimental validation and optimisation tool path strategy for thin walled structure by Alsultaney, Hazem K., Mohd Ariffin, Mohd Khairol Anuar, Baharudin, B. T. Hang Tuah, Ali, Aidy, Mustapha, Faizal

“…The target was to develop models which mimic the actual cutting process using the finite element method (FEM), to validate the developed tool path strategy algorithm with the actual machining process and to programme the developed algorithm into the software. …”
Get full text
Get full text
Get full text

Development of low power viterbi decoder on complex programmable logic device platform by Abu, Mohd Azlan

Get full text
Get full text
Get full text

Optimal route checking using genetic algorithm for UiTM's bus services / Tengku Salman Fathi Tengku Jaafar by Tengku Jaafar, Tengku Salman Fathi

“…Although from human logical thinking, the route can be generated easily but the calculation of checking the route whether it is optimal route or not is difficult and will take long time to be implemented. This research study with the development of the Optimal Route Checking Using Genetic Algorithm system should solve this scenario. …”
Get full text
Get full text

OPTIMAL DATAPATH DESIGN FOR A CRYPTOGRAPHIC PROCESSOR: THE BLOWFISH ALGORITHM by Zain Ali, Noohul Basheer, Noras, James

“…The design is suitable for implementation using small amounts of RAM and programmable logic.…”
Get full text
Get full text

Vision aided path planning for mobile robot by Rashidan, M. Ariff, Mohd Mustafah, Yasir, Abdul Hamid, Syamsul Bahrin, Y. A. M, Shawgi, Alang Md Rashid, Nahrul Khair

Get full text
Get full text
Get full text
Get full text

Design of an advanced encryption standard crypto-processor core for field programmable gate array implementation by Ismail, Mohd. Izuan

“…The proposed AES Crypto-Processor accelerates the AES algorithm in reconfigurable Field Programmable Gate Arrays (FPGA). …”
Get full text
Get full text

A reliable time base routing framework with seamless networking operation for SDN / Nauman Khan by Nauman , Khan

“…PMTRF modules and their algorithms enable the isolation of the maintenance switch and the selection of the most reliable path for future affected flows based on input time provided by the administrator. …”
Get full text
Get full text
Get full text

Performance evaluation of LTE scheduling techniques for heterogeneous traffic and different mobility scenarios by Sukeran, Lukmanhakim, Habaebi, Mohamed Hadi, Zyoud, Al-Hareth, Musse, Mohamud Ahmed, Hameed, Shihab A., Azman, Amelia Wong, Islam, Md. Rafiqul

Get full text
Get full text
Get full text
Get full text
Get full text

A review on path collisions and resources usage in hybrid optical Network on Chip (HONoC) by Razali R.A., Othman M.

A new parameterized architectural design for SENSE reconstruction by Siddiqui, M.F., Reza, A.W., Kanesan, J., Omer, H.

“…This architecture is also synthesized for Field Programmable Gate Array (FPGA). Complex multiplier, divider and complex matrix multiplier modules are designed to implement the algorithm. …”
Get full text
Get full text

A novel large-bit-size architecture and microarchitecture for the implementation of Superscalar Pipeline VLIW microprocessors by Lee, Weng Fook

Get full text

Controller placement problem in the optimization of 5G based SDN and NFV architecture by Ibrahim, Abeer Abdalla Zakaria

“…Third, the considered traffic paths across backup nodes and redundancy lengthen, increasing latency and power consumption in a network. …”
Get full text
Get full text

Magnetic resonance imaging sense reconstruction system using FPGA / Muhammad Faisal Siddiqui by Muhammad Faisal , Siddiqui

“…This thesis aimed to investigate and develop a novel parameterized architecture design for SENSE algorithm. The proposed design is implemented on Field Programmable Gate Arrays (FPGAs) platform, which can provide real-time SENSE reconstruction right on the receiver coil data acquisition system with no need to transfer data to the MRI server. …”
Get full text
Get full text
Get full text

Security testing of web applications for detecting and removing second-order SQL injection vulnerabilities by Draib, Najla'a Ateeq Mohammed

“…This technique also applies the removing algorithm, which uses escaping method to remove the detected vulnerabilities. …”
Get full text
Get full text