Search Results - (( java implementation mead algorithm ) OR ( using programme path algorithm ))

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  1. 1
    Develpoment of combinatorial optimisation for cutting tool path strategy

    Develpoment of combinatorial optimisation for cutting tool path strategy by Alsultaney, Hazem K., Mohd Ariffin, Mohd Khairol Anuar, Baharudin, B. T. Hang Tuah, Ali, Aidy, Mustapha, Faizal

    Published 2009
    “…The target was to develop models which mimic the actual cutting process using the Finite Element Method (FEM) and to validate the developed tool path strategy algorithm with the actual machining process and to programmer the developed algorithm into software. …”
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  2. 2
    Graph processing hardware accelerator for shortest path algorithms in nanometer very large-scale integration interconnect routing

    Graph processing hardware accelerator for shortest path algorithms in nanometer very large-scale integration interconnect routing by Ch'ng, Heng Sun

    Published 2007
    “…It has been shown that the performance of a graph-based shortest path algorithm can severely be affected by the performance of its priority queue. …”
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  3. 3
    An experimental validation and optimisation tool path strategy for thin walled structure

    An experimental validation and optimisation tool path strategy for thin walled structure by Alsultaney, Hazem K., Mohd Ariffin, Mohd Khairol Anuar, Baharudin, B. T. Hang Tuah, Ali, Aidy, Mustapha, Faizal

    Published 2011
    “…The target was to develop models which mimic the actual cutting process using the finite element method (FEM), to validate the developed tool path strategy algorithm with the actual machining process and to programme the developed algorithm into the software. …”
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  4. 4
    Development of low power viterbi decoder on complex programmable logic device platform

    Development of low power viterbi decoder on complex programmable logic device platform by Abu, Mohd Azlan

    Published 2018
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  5. 5
    OPTIMAL DATAPATH DESIGN FOR A CRYPTOGRAPHIC PROCESSOR: THE BLOWFISH ALGORITHM

    OPTIMAL DATAPATH DESIGN FOR A CRYPTOGRAPHIC PROCESSOR: THE BLOWFISH ALGORITHM by Zain Ali, Noohul Basheer, Noras, James

    Published 2001
    “…The design is suitable for implementation using small amounts of RAM and programmable logic.…”
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  6. 6
    Vision aided path planning for mobile robot

    Vision aided path planning for mobile robot by Rashidan, M. Ariff, Mohd Mustafah, Yasir, Abdul Hamid, Syamsul Bahrin, Y. A. M, Shawgi, Alang Md Rashid, Nahrul Khair

    Published 2014
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  7. 7
    Design of an advanced encryption standard crypto-processor core for field programmable gate array implementation

    Design of an advanced encryption standard crypto-processor core for field programmable gate array implementation by Ismail, Mohd. Izuan

    Published 2006
    “…The proposed AES Crypto-Processor accelerates the AES algorithm in reconfigurable Field Programmable Gate Arrays (FPGA). …”
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  8. 8
    Performance evaluation of LTE scheduling techniques for heterogeneous traffic and different mobility scenarios

    Performance evaluation of LTE scheduling techniques for heterogeneous traffic and different mobility scenarios by Sukeran, Lukmanhakim, Habaebi, Mohamed Hadi, Zyoud, Al-Hareth, Musse, Mohamud Ahmed, Hameed, Shihab A., Azman, Amelia Wong, Islam, Md. Rafiqul

    Published 2014
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  9. 9
    A reliable time base routing framework with seamless networking operation for SDN / Nauman Khan

    A reliable time base routing framework with seamless networking operation for SDN / Nauman Khan by Nauman , Khan

    Published 2024
    “…PMTRF modules and their algorithms enable the isolation of the maintenance switch and the selection of the most reliable path for future affected flows based on input time provided by the administrator. …”
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  10. 10
    A new parameterized architectural design for SENSE reconstruction

    A new parameterized architectural design for SENSE reconstruction by Siddiqui, M.F., Reza, A.W., Kanesan, J., Omer, H.

    Published 2014
    “…Furthermore, the variable data bus widths are used in the data path of the architecture, which leads to reduce the hardware cost and silicon area. …”
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  11. 11
    A novel large-bit-size architecture and microarchitecture for the implementation of Superscalar Pipeline VLIW microprocessors

    A novel large-bit-size architecture and microarchitecture for the implementation of Superscalar Pipeline VLIW microprocessors by Lee, Weng Fook

    Published 2008
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  12. 12
    Controller placement problem in the optimization of 5G based SDN and NFV architecture

    Controller placement problem in the optimization of 5G based SDN and NFV architecture by Ibrahim, Abeer Abdalla Zakaria

    Published 2021
    “…Extensive computations utilizing MATLAB 2018a on the Intel Core i7/Gen 10 processor and 16 GB of RAM are used to evaluate the algorithm efficacy. According to the blueprint of our heuristic method, the allocation and the optimum number of controllers under an effective decentralized policy could achieve higher efficiency. …”
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  13. 13
    Magnetic resonance imaging sense reconstruction system using FPGA / Muhammad Faisal Siddiqui

    Magnetic resonance imaging sense reconstruction system using FPGA / Muhammad Faisal Siddiqui by Muhammad Faisal , Siddiqui

    Published 2016
    “…Furthermore, variable databus widths are used in the data path of the proposed architecture, which leads to reducing the hardware cost and silicon area. …”
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  14. 14
    Security testing of web applications for detecting and removing second-order SQL injection vulnerabilities

    Security testing of web applications for detecting and removing second-order SQL injection vulnerabilities by Draib, Najla'a Ateeq Mohammed

    Published 2022
    “…This technique also applies the removing algorithm, which uses escaping method to remove the detected vulnerabilities. …”
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