Search Results - (( java implementation level algorithm ) OR ( program using descriptive algorithm ))

AUTOMATED MODEL GENERATION OF FSM AND NUSMV MODEL FROM RSA JAVA SOURCE CODE FOR MODEL CHECKING by SALLEH AL-HUMAIKANI, MOHAMMED ABDULQAWI

“…The encryption algorithms are playing an important part in the protection level for data. …”
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Implementation of (AES) Advanced Encryption Standard algorithm in communication application by Moh, Heng Huong

“…Internet communication has become more common in this modern world recently, and one of the important algorithms used is ABS algorithm. However, most of the users have inadequate knowledge and understanding regard to this algorithm implementation in the communication field, as well as the level of security and accuracy will be questioned by the users because of the necessary to maintain the confidentiality of particular data transferred. …”
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Implementation of locust inspired scheduling algorithm with huge number of servers for energy efficiency in a cloud datacenter by Azhar, Nur Huwaina

“…It does not consider the LACE algorithm implemented in huge number of server in one Cloud datacenter. …”
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A Model for Evaluation of Cryptography Algorithm on UUM Portal by Norliana, Abdul Majid

“…Level one is the development of userID and password, level two involve the insertion of the testing parameter speed coding. …”
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Comparison of Search Algorithms in Javanese-Indonesian Dictionary Application by Yana Aditia, Gerhana, Nur, Lukman, Arief Fatchul, Huda, Cecep Nurul, Alam, Undang, Syaripudin, Devi, Novitasari

“…Performance Testing is used to test the performance of algorithm implementations in applications. The test results show that the Boyer Moore and Knuth Morris Pratt algorithms have an accuracy rate of 100%, and the Horspool algorithm 85.3%. …”
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An improved RSA cryptosystem based on thread and CRT / Saheed Yakub Kayode and Gbolagade Kazeem Alagbe by Yakub Kayode, Saheed, Kazeem Alagbe, Gbolagade

“…We use a parallel technique that divides RSA power process into seperate threads and employs the use of Chinese Remainder Theorem (CRT) to decrease the time required for both encryption and decryption operation. Java programming language is used to implement the algorithm. …”
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Design and Implementation of Data-at-Rest Encryption for Hadoop by Wan Nor Shuhadah, Wan Nik, Mohamad Afendee, Mohamed, Zarina, Mohamad, Siti Hanisah, Kamaruzaman

“…Therefore, the AES encryption algorithm has been implemented in HDFS to ensure the security of data stored in HDFS. …”
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Design and Implementation of Data-at-Rest Encryption for Hadoop by Wan Nor Shuhadah, Wan Nik, Mohamad Afendee, Mohamed, Zarina, Mohamad, Siti Hanisah, Kamaruzaman

“…Therefore, the AES encryption algorithm has been implemented in HDFS to ensure the security of data stored in HDFS. …”
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CAR TRACTION CONTROL SYSTEM by MOHD ISMAIL, ADIBAH

“…The core programming language which will be used as the hardware description language is VHSIC Hardware Description Language (VHDL). …”
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Encryption using FPGA by Nor Robaini, Ibrahim

“…The AES algorithm is capable of using cryptographic keys of 128, 192, and 256 bits, this project implements the 128 bit standard on a Field Programming Gate Array (FPGA) using the VHDL, a hardware description language.…”
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Optimizing Visual Surveillance Sensor Coverage Using Dynamic Programming by Altahir, A.A., Asirvadam, V.S., Hamid, N.H.B., Sebastian, P., Saad, N.B., Ibrahim, R.B., Dass, S.C.

“…To validate the proposed algorithm, we compared the outcomes of the dynamic programming algorithm with the existing benchmarking placement optimization techniques. …”
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Booth’s Algorithm Design Using Field Programmable Gate Array by Ab Hadi, Nik Azran, A Aziz, Khairul Azha, Hashim, Nik Mohd Zarifie, Omar, Muhammad Shukri, Jaafar, Anuar

“…The high speed operation and less space and energy required had made the digital devices more preferred.This project is to design digital system which performed fixed point Booth Multiplier Algorithm where the design system would be developed using hardware description language (HDL),in this case,VHDL (VHSIC Hardware Description Language),VHSIC stands for Very High Speed Integrated Circuit.In this project would be used Xilinx ISE 10.1which is the software used to designed digital system for Xilinx manufactured FPGA board.In Xilinx have two main languages which are VHDL and Verilog.For design Booth’s Multiplier Algorithm we used Verilog code which is has to create the program module and test bench.In that case,to design digital system will have input and output which is input is 8 bits and output is 16 bits.Finally, it is proven that the system created can calculate and yield a fixed point multiplied output of the input value. …”
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Secure E-Voting With Blind Signature by Ibrahim, Subariah, Kamat, Maznah, Salleh, Mazleena, Abdul Aziz, Shah Rizan

“…In this system, voter’s privacy is guaranteed by using a blind signature for confidentiality and voter’s digital signature for voter’s authentication. E-Voting is implemented by employing Java socket technology and BouncyCastle cryptography provider. …”
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Enhancing Performance of Batik SMEs through Cleaner Production Adoption: Insights from Clustering Algorithm Analysis by Achmad, Fandi, Zulkarnain, Ibnu, Rumanti, Augustina Asih, Wiratmadja, Iwan Inrawan, Shuhidan, Shuhaida Mohamed

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Implementation of AES algorithm into information investigation autopsy (IIA) / Ahmad Wafiy Hamad Zaki by Hamad Zaki, Ahmad Wafiy Hamad Zaki

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Decision Tree: Customer churn analysis for a loyalty program using data mining algorithm by Lee, Angela Siew Hoong *, Zuraini Zainol, Ng, Claudia, Chan, Khin Whai

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Implementation of PRINCE algorithm in FPGA by Abbas Y.A., Jidin R., Jamil N., Z'aba M.R., Rusli M.E., Tariq B.

Network monopoly / Tan Kean Yeap by Tan , Kean Yeap

“…The main aspect of this thesis is to produce a network monopoly system, which process multiple game sessions concurrently, enabling users to play the graphical game with people within the network. The algorithm design and implementation method mustnot only be workable, but also highly efficient in terms of execution speed and respond time. …”
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Twofold Integer Programming Model for Improving Rough Set Classification Accuracy in Data Mining. by Saeed, Walid

“…The accuracy for rules and classification resulted from the TIP method are compared with other methods such as Standard Integer Programming (SIP) and Decision Related Integer Programming (DRIP) from Rough Set, Genetic Algorithm (GA), Johnson reducer, HoltelR method, Multiple Regression (MR), Neural Network (NN), Induction of Decision Tree Algorithm (ID3) and Base Learning Algorithm (C4.5); all other classifiers that are mostly used in the classification tasks. …”
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Implementation of quantization in MPEG-2 encoder using Xilinx FPGA technology by Abdul Razak, Razilawati

“…Very High Speed Hardware Description Language (VHDL) is used to program the behavioral logic design of quantization. …”
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