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  1. 1
    Implementation of locust inspired scheduling algorithm with huge number of servers for energy efficiency in a cloud datacenter

    Implementation of locust inspired scheduling algorithm with huge number of servers for energy efficiency in a cloud datacenter by Azhar, Nur Huwaina

    Published 2019
    “…In the benchmark paper, the result of implementation of LACE algorithm in 400, 600, 800 and 1000 servers were plotted at different graphs. …”
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  2. 2
    Digital beamforming implementation of switch-beam smart antenna system by using integrated digital signal processor and field-programmable gate array

    Digital beamforming implementation of switch-beam smart antenna system by using integrated digital signal processor and field-programmable gate array by Vakilian, Vida

    Published 2008
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  3. 3
    Priority and dynamic quantum time algorithms for central processing unit scheduling

    Priority and dynamic quantum time algorithms for central processing unit scheduling by Mohammed, Maysoon A.

    Published 2018
    “…The proposed algorithms (Priority Dynamic Quantum Time and Multi Priority Dynamic Quantum Time Algorithms) are implemented using JAVA programming language and validated using Key Performance Indicators equations. …”
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  4. 4
    FPGA Implementation of Emergency Door Car Entry System

    FPGA Implementation of Emergency Door Car Entry System by Zaini Sulaiman

    Published 2008
    “…Emergency door car entry system can be implemented using Field Programmable Gate Array (FPGA) board. …”
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  5. 5
    MBIST implementation and evaluation in FPGA based on low-complexity March algorithms

    MBIST implementation and evaluation in FPGA based on low-complexity March algorithms by Jidin, Aiman Zakwan, Mispan, Mohd Syafiq, Hussin, Razaidi, Weng, Fook Lee

    Published 2024
    “…March algorithms are widely used in Memory Built-In Self-Test (MBIST) on-chip memory testing, providing linear test complexities that reduce the test time and cost. …”
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  6. 6
    Development of low power viterbi decoder on complex programmable logic device platform

    Development of low power viterbi decoder on complex programmable logic device platform by Abu, Mohd Azlan

    Published 2018
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  7. 7
    Fast fourier transform processor implementation for high inputs on field programmable gates array

    Fast fourier transform processor implementation for high inputs on field programmable gates array by Ali Abbas, Zaid

    Published 2018
    “…Verilog Hardware Description Language (Verilog HDL) and VHDL Languages are used to program the algorithms into the FPGA. FFT algorithms will be implemented for up to 4096 points to measure the high load processing capability. …”
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  8. 8
    CPLD based controller for single phase inverters

    CPLD based controller for single phase inverters by Saiman, Suhaimi

    Published 2007
    “…A design and implementation of PWM by using complex programmable logic device (CPLD) from Altera MaxPlus II is constructed and programmed. …”
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  9. 9
    CPLD based controller for single phase inverters

    CPLD based controller for single phase inverters by Saiman, Suhaimi

    Published 2007
    “…A design and implementation of PWM by using complex programmable logic device (CPLD) from Altera MaxPlus II is constructed and programmed. …”
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  10. 10
    Digital Signal Processor (DSP) Design Using Very Long Instruction Word (VLIW) Architecture

    Digital Signal Processor (DSP) Design Using Very Long Instruction Word (VLIW) Architecture by Lee, Lini @ Lini Lee

    Published 2001
    “…In order to gain most benefit from the architecture, "Field Programmable Gate Array" (FPGA) technology can be used. …”
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  11. 11
    The design of viterbi decoder for low power consumption space time trellis code without adder architecture using RTL model

    The design of viterbi decoder for low power consumption space time trellis code without adder architecture using RTL model by Abu, Mohd Azlan, Harun, Harlisya, Harmin, Mohammad Yazdi, Abdul Wahab, Noor Izzri, Abdul Kadir, Muhd Khairulzaman

    Published 2016
    “…The decoding process has been carried out using maximum likelihood sequences estimation through the Viterbi algorithm. …”
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  12. 12
    Evolutionary cost-cognizant regression test case prioritization for object-oriented programs

    Evolutionary cost-cognizant regression test case prioritization for object-oriented programs by Bello, AbdulKarim

    Published 2019
    “…Therefore, this study proposed a cost-cognizant TCP approach for object-oriented software that uses path-based integration testing to identify the possible execution path extracted from the Java System Dependence Graph (JSDG) model of the source code using forward slicing technique. …”
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